search for: tmp16

Displaying 20 results from an estimated 45 matches for "tmp16".

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2010 Apr 20
2
[LLVMdev] How to delete a instruction?
Hi, when I delete some instruction, I got some error prompt message. - %i.0.reg2mem.0 = phi i32 [ 0, %bb5 ], [ %indvar.next, %bb12 ] ; <i32> [#uses=2] - %s.0.reg2mem.0 = phi i32 [ 0, %bb5 ], [ %tmp16, %bb12 ] ; <i32> [#uses=1] - %tmp14 = tail call i32 @foobar(i32 %i.0.reg2mem.0) nounwind ; <i32> [#uses=1] - %tmp16 = add i32 %tmp14, %s.0.reg2mem.0 ; <i32> [#uses=2] %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2] %exitcond = icmp eq i32 %i...
2008 Dec 07
1
[LLVMdev] How to extract loop body into a new function?
...2 * B[i2]; } The IR for which is: bb13: ; preds = %bb13, %bb %i2.0.reg2mem.0 = phi i32 [ 0, %bb ], [ %indvar.next62, %bb13 ] ; <i32> [#uses=2] %tmp15 = getelementptr [25 x i32]* %B, i32 0, i32 %i2.0.reg2mem.0 ; <i32*> [#uses=1] %tmp16 = load i32* %tmp15, align 4 ; <i32> [#uses=2] %tmp20 = shl i32 %tmp16, 1 ; <i32> [#uses=1] %tmp21 = getelementptr [25 x i32]* %A, i32 0, i32 %tmp16 ; <i32*> [#uses=1] store i32 %tmp20, i32* %tmp21, align 4 %i...
2008 Dec 09
1
[LLVMdev] scalar-evolution + indvars fail to get the loop trip count?
...%tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1] %tmp11 = getelementptr i32* %lam, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1] store i32 %tmp8, i32* %tmp11, align 4 %tmp13 = sub i32 254, %indvar ; <i32> [#uses=1] %tmp16 = icmp slt i32 %tmp13, 0 ; <i1> [#uses=1] %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] br i1 %tmp16, label %bb17, label %bb bb17: ; preds = %bb %indvar.lcssa = phi i32 [ %indvar, %bb ] ; <i32> [#uses=1]...
2008 Feb 16
0
[LLVMdev] linux/x86-64 codegen support
libcpp/charset.c:631 turns into: %tmp16 = tail call i64 @strlen( i8* %to ) nounwind readonly ; <i64> [#uses=1] %tmp18 = tail call i64 @strlen( i8* %from ) nounwind readonly ; <i64> [#uses=1] %tmp19 = add i64 %tmp16, 2 ; <i64> [#uses=1] %tmp20 = add i64 %tmp19, %tmp18...
2008 Feb 16
2
[LLVMdev] linux/x86-64 codegen support
PR1711 is an x86 codegen problem that is blocking adoption of llvm-gcc by people using linux on x86-64 boxes. Could someone with access to one of these boxes take a look? I'll help try to debug this, but I don't have access to a machine. I bet it's a small tweak required in the x86 backend. Thanks! -Chris
2011 Oct 06
2
[LLVMdev] A potential bug
...mp15 = load i32* %tv_sec.safe_r, align 4, !tbaa !4 // this loads the value stored at line 6 14. %tv_usec = getelementptr inbounds %struct.timeval* %agg.tmp, i32 0, i32 1 15. %tv_usec.safe_r = call i32* @llvm.guard.load.p0i32(i32* %tv_usec) // intrinsic function call ... 16. %tmp16 = load i32* %tv_usec.safe_r, align 4, !tbaa !4 17. %tv_sec17 = getelementptr inbounds %struct.timeval* %agg.tmp12, i32 0, i32 0 18. %tv_sec17.safe_r = call i32* @llvm.guard.load.p0i32(i32* %tv_sec17) // intrinsic function call ... 19. %tmp18 = load i32* %tv_sec17.safe_r, align 4, !tbaa !4 20....
2010 Sep 10
1
[LLVMdev] Missing Optimization Opportunities
...; <i32> [#uses=1] %tmp13 = icmp eq i32 %tmp12, 721420288 ; <i1> [#uses=3] %tmp14 = and i1 %tmp2, %tmp5 ; <i1> [#uses=1] %tmp15 = and i1 %tmp13, %tmp14 ; <i1> [#uses=1] tail call void @spa.assert(i1 %tmp15) %tmp16 = and i1 %tmp8, %tmp10 ; <i1> [#uses=1] %tmp17 = and i1 %tmp13, %tmp16 ; <i1> [#uses=1] tail call void @spa.assert(i1 %tmp17) %tmp18 = and i1 %tmp13, %tmp7 ; <i1> [#uses=1] tail call void @spa.assert(i1 %tmp18) ret voi...
2007 Jun 12
3
[LLVMdev] ARM backend problem ?
...tore i32 5, i32* %n store i32 1, i32* %f store i32 1, i32* %i store i32 0 , i32* %zero store i32 1 , i32* %inc %tmp7 = load i32* %n %tmp8 = load i32* %zero %tmp6 = icmp sgt i32 %tmp7, %tmp8 br i1 %tmp6, label %then4, label %else12 then4: %tmp14 = load i32* %i %tmp16 = load i32* %n %tmp18 = load i32* %inc %tmp15 = add i32 %tmp16, %tmp18 %tmp13 = icmp slt i32 %tmp14, %tmp15 br i1 %tmp13, label %then11, label %else12 then11: %tmp20 = load i32* %f %tmp22 = alloca i32 store i32 1 , i32* %tmp22 %tmp23 = load i32* %tmp22 %tmp24 = load i...
2011 Oct 06
2
[LLVMdev] A potential bug
...t; !4                     // this loads the value stored at line 6 >> 14.  %tv_usec = getelementptr inbounds %struct.timeval* %agg.tmp, i32 0, i32 >> 1 >> 15.  %tv_usec.safe_r = call i32* @llvm.guard.load.p0i32(i32* %tv_usec)  // >> intrinsic function call ... >> 16.  %tmp16 = load i32* %tv_usec.safe_r, align 4, !tbaa !4 >> 17.  %tv_sec17 = getelementptr inbounds %struct.timeval* %agg.tmp12, i32 0, >> i32 0 >> 18.  %tv_sec17.safe_r = call i32* @llvm.guard.load.p0i32(i32* %tv_sec17)  // >> intrinsic function call ... >> 19.  %tmp18 = load i...
2013 Oct 27
2
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
...i64 2 %tmp7 = load i8* %tmp6, align 1 %tmp8 = zext i8 %tmp7 to i32 %tmp9 = shl nuw nsw i32 %tmp8, 16 %tmp10 = or i32 %tmp9, %tmp4 %tmp12 = getelementptr inbounds i8* %x_arg, i64 1 %tmp13 = load i8* %tmp12, align 1 %tmp14 = zext i8 %tmp13 to i32 %tmp15 = shl nuw nsw i32 %tmp14, 8 %tmp16 = or i32 %tmp10, %tmp15 %tmp19 = load i8* %x_arg, align 4 %tmp20 = zext i8 %tmp19 to i32 %tmp21 = or i32 %tmp16, %tmp20 ret i32 %tmp21 } attributes #0 = { nounwind readonly } --- Is there a reason why this can't be optimized down to a single i32 load based on the IR semantics, or is t...
2008 Jan 06
4
[LLVMdev] Another memory fun
...2 0, i32 2 ; <i8*> [#uses=1] store i8 116, i8* %tmp7, align 1 %tmp10 = getelementptr [8 x i8]* %str1, i32 0, i32 3 ; <i8*> [#uses=1] store i8 104, i8* %tmp10, align 1 %tmp13 = getelementptr [8 x i8]* %str1, i32 0, i32 4 ; <i8*> [#uses=1] store i8 101, i8* %tmp13, align 1 %tmp16 = getelementptr [8 x i8]* %str1, i32 0, i32 5 ; <i8*> [#uses=1] store i8 114, i8* %tmp16, align 1 %tmp19 = getelementptr [8 x i8]* %str1, i32 0, i32 6 ; <i8*> [#uses=1] store i8 32, i8* %tmp19, align 1 %tmp22 = getelementptr [8 x i8]* %str1, i32 0, i32 7 ; <i8*> [#uses=1]...
2011 Oct 06
0
[LLVMdev] A potential bug
...r, align 4, !tbaa > !4                     // this loads the value stored at line 6 > 14.  %tv_usec = getelementptr inbounds %struct.timeval* %agg.tmp, i32 0, i32 > 1 > 15.  %tv_usec.safe_r = call i32* @llvm.guard.load.p0i32(i32* %tv_usec)  // > intrinsic function call ... > 16.  %tmp16 = load i32* %tv_usec.safe_r, align 4, !tbaa !4 > 17.  %tv_sec17 = getelementptr inbounds %struct.timeval* %agg.tmp12, i32 0, > i32 0 > 18.  %tv_sec17.safe_r = call i32* @llvm.guard.load.p0i32(i32* %tv_sec17)  // > intrinsic function call ... > 19.  %tmp18 = load i32* %tv_sec17.safe_r...
2008 Jan 12
1
[LLVMdev] Labels
...( i8* %tmp5, i32 %tmp3 ) store i8* %tmp6, i8** @yybuf, align 4 %tmp8 = load i32* @yybuflen, align 4 %tmp9 = load i32* @yypos, align 4 %tmp10 = sub i32 %tmp8, %tmp9 %tmp11 = icmp slt i32 %tmp10, 512 br i1 %tmp11, label %bb, label %bb13 bb13: %tmp15 = load %struct._IO_FILE** @stdin, align 4 %tmp16 = tail call i32 @_IO_getc( %struct._IO_FILE* %tmp15 ) %tmp21 = icmp eq i32 %tmp16, -1 br i1 %tmp21, label %cond_next, label %cond_true cond_true: %tmp24 = load i8** @yybuf, align 4 %tmp25 = load i32* @yypos, align 4 %tmp2627 = trunc i32 %tmp16 to i8 %tmp28 = getelementptr i8* %tmp24, i32 %tm...
2010 Apr 20
0
[LLVMdev] How to delete a instruction?
...are deleted first; or 2) Replace all uses of the instructions to delete with an Undef value first and then delete the instruction. -- John T. > > - %i.0.reg2mem.0 = phi i32 [ 0, %bb5 ], [ %indvar.next, %bb12 ] ; > <i32> [#uses=2] > - %s.0.reg2mem.0 = phi i32 [ 0, %bb5 ], [ %tmp16, %bb12 ] ; <i32> > [#uses=1] > - %tmp14 = tail call i32 @foobar(i32 %i.0.reg2mem.0) nounwind ; <i32> > [#uses=1] > - %tmp16 = add i32 %tmp14, %s.0.reg2mem.0 ; <i32> [#uses=2] > %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2] &g...
2007 Aug 02
0
[LLVMdev] Debug info for conditionally defined variables?
...e* @llvm.dbg.variable792014 to { }*) ) // Declares tm as tm call void @llvm.dbg.declare( { }* %tm8, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable91 to { }*) ) ... cond_true: %tmp15 = call %struct.tm* @localtime( i64* %curr ) br label %cond_next cond_false: %tmp16 = call %struct.tm* @gmtime( i64* %curr ) br label %cond_next cond_next: %storemerge = phi %struct.tm* [ %tmp15, %cond_true ], [ %tmp16, %cond_false ] store %struct.tm* %storemerge, %struct.tm** %iftmp.0 %tmp17 = load %struct.tm** %iftmp.0 store %struct.tm* %tmp17, %struct.tm**...
2007 Jun 12
0
[LLVMdev] ARM backend problem ?
...i32* %zero > > store i32 1 , i32* %inc > > > > %tmp7 = load i32* %n > > %tmp8 = load i32* %zero > > %tmp6 = icmp sgt i32 %tmp7, %tmp8 > > br i1 %tmp6, label %then4, label %else12 > > > > then4: > > %tmp14 = load i32* %i > > %tmp16 = load i32* %n > > %tmp18 = load i32* %inc > > %tmp15 = add i32 %tmp16, %tmp18 > > %tmp13 = icmp slt i32 %tmp14, %tmp15 > > br i1 %tmp13, label %then11, label %else12 > > > > then11: > > %tmp20 = load i32* %f > > %tmp22 = alloca i32 > &...
2010 Nov 23
1
[LLVMdev] Unrolling loops into constant-time expressions
...ret += 1+i*i + i*(i+2); } return ret; } generates: define i32 @loop(i32 %x) nounwind readnone { %1 = icmp sgt i32 %x, 0 br i1 %1, label %bb.nph, label %3 bb.nph: ; preds = %0 %tmp4 = add i32 %x, -1 %tmp6 = add i32 %x, -2 %tmp16 = add i32 %x, -3 %tmp7 = zext i32 %tmp6 to i33 %tmp5 = zext i32 %tmp4 to i33 %tmp17 = zext i32 %tmp16 to i33 %tmp15 = mul i33 %tmp5, %tmp7 %tmp18 = mul i33 %tmp15, %tmp17 %tmp8 = mul i32 %tmp4, %tmp6 %tmp19 = lshr i33 %tmp18, 1 %2 = shl i32 %tmp8, 2 %tmp20 = trun...
2008 Dec 07
0
[LLVMdev] How to extract loop body into a new function?
Sorry! It worked with ExtractBasicBlock() ----- Original Message ----- From: "Mrunal J Shah" <mrunal.shah at gatech.edu> To: "llvmdev" <llvmdev at cs.uiuc.edu> Sent: Saturday, December 6, 2008 8:30:33 PM GMT -05:00 US/Canada Eastern Subject: [LLVMdev] How to extract loop body into a new function? Hi All, I am having trouble extracting loop body into a new
2011 Oct 06
0
[LLVMdev] A potential bug
...loads the value stored at line 6 > >> 14. %tv_usec = getelementptr inbounds %struct.timeval* %agg.tmp, i32 0, > i32 > >> 1 > >> 15. %tv_usec.safe_r = call i32* @llvm.guard.load.p0i32(i32* %tv_usec) > // > >> intrinsic function call ... > >> 16. %tmp16 = load i32* %tv_usec.safe_r, align 4, !tbaa !4 > >> 17. %tv_sec17 = getelementptr inbounds %struct.timeval* %agg.tmp12, i32 > 0, > >> i32 0 > >> 18. %tv_sec17.safe_r = call i32* @llvm.guard.load.p0i32(i32* > %tv_sec17) // > >> intrinsic function call ......
2010 Jan 29
2
[LLVMdev] 64bit MRV problem: { float, float, float} -> { double, float }
..., float* noalias nocapture %resY, float* noalias nocapture %resZ) nounwind { entry: %0 = fadd float %aZ, 5.000000e-01 ; <float> [#uses=1] %1 = fadd float %aY, 5.000000e-01 ; <float> [#uses=1] %2 = fadd float %aX, 5.000000e-01 ; <float> [#uses=1] %tmp16.i.i = bitcast float %1 to i32 ; <i32> [#uses=1] %tmp17.i.i = zext i32 %tmp16.i.i to i96 ; <i96> [#uses=1] %tmp18.i.i = shl i96 %tmp17.i.i, 32 ; <i96> [#uses=1] %tmp19.i = zext i96 %tmp18.i.i to i128 ; <i128> [#uses=1] %tmp8.i =...