Displaying 20 results from an estimated 33 matches for "tmp13".
Did you mean:
tmp1
2010 Sep 10
1
[LLVMdev] Missing Optimization Opportunities
...2]
%tmp9 = icmp ne i32 %tmp6, 168296704 ; <i1> [#uses=1]
%tmp10 = and i1 %tmp8, %tmp9 ; <i1> [#uses=1]
%tmp11 = load i32* @src-ip ; <i32> [#uses=1]
%tmp12 = and i32 %tmp11, -16777216 ; <i32> [#uses=1]
%tmp13 = icmp eq i32 %tmp12, 721420288 ; <i1> [#uses=3]
%tmp14 = and i1 %tmp2, %tmp5 ; <i1> [#uses=1]
%tmp15 = and i1 %tmp13, %tmp14 ; <i1> [#uses=1]
tail call void @spa.assert(i1 %tmp15)
%tmp16 = and i1 %tmp8, %tmp10...
2008 Dec 09
1
[LLVMdev] scalar-evolution + indvars fail to get the loop trip count?
...i32* %alp, i32 %i.0.reg2mem.0 ;
<i32*> [#uses=1]
%tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1]
%tmp11 = getelementptr i32* %lam, i32 %i.0.reg2mem.0 ;
<i32*> [#uses=1]
store i32 %tmp8, i32* %tmp11, align 4
%tmp13 = sub i32 254, %indvar ; <i32> [#uses=1]
%tmp16 = icmp slt i32 %tmp13, 0 ; <i1> [#uses=1]
%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
br i1 %tmp16, label %bb17, label %bb
bb17: ; preds = %bb
%indvar...
2007 Feb 05
1
[LLVMdev] Misc optimization issue
...!
; ModuleID = '/tmp/webcompile/_24843_0.bc'
target datalayout = "e-p:32:32"
target endian = little
target pointersize = 32
target triple = "i686-pc-linux-gnu"
implementation ; Functions:
int %ltst(int %x) {
entry:
%x = cast int %x to uint ; <uint> [#uses=1]
%tmp13 = setgt int %x, 0 ; <bool> [#uses=1]
br bool %tmp13, label %bb, label %bb7
bb: ; preds = %bb, %entry
%indvar = phi uint [ 0, %entry ], [ %indvar.next, %bb ] ; <uint> [#uses=2]
%i.0.0 = cast uint %indvar to int ; <int>...
2008 Jan 12
1
[LLVMdev] Labels
...i32* @yylimit, align 4
%tmp3 = icmp slt i32 %tmp1, %tmp2
br i1 %tmp3, label %cond_next11, label %cond_true
cond_true:
%tmp5 = tail call i32 @yyrefill( )
%tmp6 = icmp eq i32 %tmp5, 0
br i1 %tmp6, label %UnifiedReturnBlock, label %cond_next11
cond_next11:
%tmp12 = load i32* @yypos, align 4
%tmp13 = add i32 %tmp12, 1
store i32 %tmp13, i32* @yypos, align 4
ret i32 1
UnifiedReturnBlock:
ret i32 0
}
define i32 @yymatchChar(i32 %c)
{
entry:
%tmp1 = load i32* @yypos, align 4
%tmp2 = load i32* @yylimit, align 4
%tmp3 = icmp slt i32 %tmp1, %tmp2
br i1 %tmp3, label %cond_next11, label %cond...
2007 Jun 12
3
[LLVMdev] ARM backend problem ?
...2* %zero
store i32 1 , i32* %inc
%tmp7 = load i32* %n
%tmp8 = load i32* %zero
%tmp6 = icmp sgt i32 %tmp7, %tmp8
br i1 %tmp6, label %then4, label %else12
then4:
%tmp14 = load i32* %i
%tmp16 = load i32* %n
%tmp18 = load i32* %inc
%tmp15 = add i32 %tmp16, %tmp18
%tmp13 = icmp slt i32 %tmp14, %tmp15
br i1 %tmp13, label %then11, label %else12
then11:
%tmp20 = load i32* %f
%tmp22 = alloca i32
store i32 1 , i32* %tmp22
%tmp23 = load i32* %tmp22
%tmp24 = load i32* %i
%tmp21 = add i32 %tmp24, %tmp23
store i32 %tmp21, i32* %i
%tmp19 = mul...
2013 Oct 27
2
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
...p3 = zext i8 %tmp2 to i32
%tmp4 = shl nuw nsw i32 %tmp3, 24
%tmp6 = getelementptr inbounds i8* %x_arg, i64 2
%tmp7 = load i8* %tmp6, align 1
%tmp8 = zext i8 %tmp7 to i32
%tmp9 = shl nuw nsw i32 %tmp8, 16
%tmp10 = or i32 %tmp9, %tmp4
%tmp12 = getelementptr inbounds i8* %x_arg, i64 1
%tmp13 = load i8* %tmp12, align 1
%tmp14 = zext i8 %tmp13 to i32
%tmp15 = shl nuw nsw i32 %tmp14, 8
%tmp16 = or i32 %tmp10, %tmp15
%tmp19 = load i8* %x_arg, align 4
%tmp20 = zext i8 %tmp19 to i32
%tmp21 = or i32 %tmp16, %tmp20
ret i32 %tmp21
}
attributes #0 = { nounwind readonly }
---
Is t...
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
2007 Jan 29
2
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
...#uses=1]
%tmp5 = getelementptr [7 x [7 x [7 x int]]]* %mat, int 0, int
%i.0.0.ph, int %j.1.2.ph, int %k.2.4 ; <int*> [#uses=1]
%tmp6 = load int* %tmp5 ; <int> [#uses=1]
%tmp10 = xor int %k.2.4, 1 ; <int> [#uses=1]
%tmp13 = getelementptr [7 x [7 x [7 x int]]]* %mat, int 0, int
%i.0.0.ph, int %j.1.2.ph, int %tmp10 ; <int*> [#uses=1]
%tmp14 = load int* %tmp13 ; <int> [#uses=1]
%tmp15 = xor int %tmp14, %tmp6 ; <int> [#uses=1]
%tmp17 = add int...
2008 Jan 06
4
[LLVMdev] Another memory fun
...i32 0, i32 1 ; <i8*> [#uses=1]
store i8 111, i8* %tmp4, align 1
%tmp7 = getelementptr [8 x i8]* %str1, i32 0, i32 2 ; <i8*> [#uses=1]
store i8 116, i8* %tmp7, align 1
%tmp10 = getelementptr [8 x i8]* %str1, i32 0, i32 3 ; <i8*> [#uses=1]
store i8 104, i8* %tmp10, align 1
%tmp13 = getelementptr [8 x i8]* %str1, i32 0, i32 4 ; <i8*> [#uses=1]
store i8 101, i8* %tmp13, align 1
%tmp16 = getelementptr [8 x i8]* %str1, i32 0, i32 5 ; <i8*> [#uses=1]
store i8 114, i8* %tmp16, align 1
%tmp19 = getelementptr [8 x i8]* %str1, i32 0, i32 6 ; <i8*> [#uses=1]...
2007 Jun 12
0
[LLVMdev] ARM backend problem ?
...d i32* %zero
>
> %tmp6 = icmp sgt i32 %tmp7, %tmp8
>
> br i1 %tmp6, label %then4, label %else12
>
>
>
> then4:
>
> %tmp14 = load i32* %i
>
> %tmp16 = load i32* %n
>
> %tmp18 = load i32* %inc
>
> %tmp15 = add i32 %tmp16, %tmp18
>
> %tmp13 = icmp slt i32 %tmp14, %tmp15
>
> br i1 %tmp13, label %then11, label %else12
>
>
>
> then11:
>
> %tmp20 = load i32* %f
>
> %tmp22 = alloca i32
>
> store i32 1 , i32* %tmp22
>
> %tmp23 = load i32* %tmp22
>
> %tmp24 = load i32* %i
>
>...
2010 Nov 23
1
[LLVMdev] Unrolling loops into constant-time expressions
...%tmp15 = mul i33 %tmp5, %tmp7
%tmp18 = mul i33 %tmp15, %tmp17
%tmp8 = mul i32 %tmp4, %tmp6
%tmp19 = lshr i33 %tmp18, 1
%2 = shl i32 %tmp8, 2
%tmp20 = trunc i33 %tmp19 to i32
%tmp12 = mul i32 %x, 5
%tmp1125 = and i32 %2, -8
%tmp21 = mul i32 %tmp20, 1431655764
%tmp13 = add i32 %tmp1125, %tmp12
%tmp14 = add i32 %tmp13, -4
%tmp22 = sub i32 %tmp14, %tmp21
ret i32 %tmp22
; <label>:3 ; preds = %0
ret i32 0
}
which has no loop, which means that clang -O3 is capable of:
* unrolling expressions like
for...
2015 Jun 11
4
[LLVMdev] Question about NoWrap flag for SCEVAddRecExpr
...%tmp9 = shl nsw i64 %tmp8, 1
> %tmp10 = getelementptr inbounds [1024 x float], [1024 x float]*
> @x, i64 0, i64 %tmp9
> %tmp11 = load float, float* %tmp10, align 8, !tbaa !2
> %tmp12 = getelementptr inbounds [1024 x float], [1024 x float]*
> @y, i64 0, i64 %tmp8
> %tmp13 = load float, float* %tmp12, align 4, !tbaa !2
> %tmp14 = fadd float %tmp11, %tmp13
> store float %tmp14, float* %tmp10, align 8, !tbaa !2
> %tmp15 = add nsw i64 %k.01, 2
> %exitcond.1 = icmp eq i64 %tmp15, 512
> br i1 %exitcond.1, label %bb1, label %bb2
> }
>...
2015 Jun 10
3
[LLVMdev] Question about NoWrap flag for SCEVAddRecExpr
I am testing vectorization on the following test case:
float x[1024], y[1024];
void myloop1() {
for (long int k = 0; k < 512; k++) {
x[2*k] = x[2*k]+y[k];
}
}
Vectorization failed due to "unsafe dependent memory operation". I traced
the LoopAccessAnalysis.cpp and found the reason is the NoWrapFlag for
SCEVAddRecExpr is not set and consequently the
2013 Oct 28
0
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
...shl nuw nsw i32 %tmp3, 24
> %tmp6 = getelementptr inbounds i8* %x_arg, i64 2
> %tmp7 = load i8* %tmp6, align 1
> %tmp8 = zext i8 %tmp7 to i32
> %tmp9 = shl nuw nsw i32 %tmp8, 16
> %tmp10 = or i32 %tmp9, %tmp4
> %tmp12 = getelementptr inbounds i8* %x_arg, i64 1
> %tmp13 = load i8* %tmp12, align 1
> %tmp14 = zext i8 %tmp13 to i32
> %tmp15 = shl nuw nsw i32 %tmp14, 8
> %tmp16 = or i32 %tmp10, %tmp15
> %tmp19 = load i8* %x_arg, align 4
> %tmp20 = zext i8 %tmp19 to i32
> %tmp21 = or i32 %tmp16, %tmp20
> ret i32 %tmp21
> }
>
>...
2010 Sep 29
0
[LLVMdev] spilling & xmm register usage
...call62.i
> %call.i.i = tail call float @fabs(float %tmp53.i) nounwind
> %tmp5.i.i = fmul float %call.i.i, 0x3FCDA67120000000
> %tmp6.i.i = fadd float %tmp5.i.i, 1.000000e+00
> %tmp7.i.i = fdiv float 1.000000e+00, %tmp6.i.i
> %tmp11.i.i = fsub float -0.000000e+00, %tmp53.i
> %tmp13.i.i = fmul float %tmp53.i, %tmp11.i.i
> %tmp15.i.i = fdiv float %tmp13.i.i, 2.000000e+00
> %call16.i.i = tail call float @llvm.exp.f32(float %tmp15.i.i) nounwind
> %tmp17.i.i = fmul float %call16.i.i, 0x3FD9884540000000
> %tmp19.i.i = fmul float %tmp17.i.i, %tmp7.i.i
> %tmp29.i....
2007 Aug 16
0
[LLVMdev] Strange error of llvm-ld
Holger,
I have just committed a patch to cause the linker to properly propagate
error messages from the LinkModules method up to higher levels of the
linker. With this change it should tell you with more detail what is
going on (why it couldn't link the file in). Please update, rebuild and
try again. If you think the error message is wrong after that, please
file a bug for this.
To get
2008 Jan 06
0
[LLVMdev] Another memory fun
...11, i8* %tmp4, align 1
> %tmp7 =
> getelementptr [8 x i8]* %str1, i32 0, i32 2 ; <i8*> [#uses=1]
>
> store i8 116, i8* %tmp7, align 1
> %tmp10 = getelementptr [8 x i8]* %str1,
> i32 0, i32 3 ; <i8*> [#uses=1]
> store i8 104, i8
> * %tmp10, align 1
> %tmp13 = getelementptr [8 x i8]* %str1, i32 0, i32 4 ; <
> i8*> [#uses=1]
> store i8 101, i8* %tmp13, align 1
> %tmp16 = getelementptr [8 x
> i8]* %str1, i32 0, i32 5 ; <i8*> [#uses=1]
> store
> i8 114, i8* %tmp16, align 1
> %tmp19 = getelementptr [8 x i8]* %str1,...
2010 Nov 07
0
[LLVMdev] Hoisting elements of array argument into registers
...%3 = getelementptr inbounds [4 x i32]* %sp, i64 0, i64 3
store i32 0, i32* %3, align 4
%4 = icmp eq i32 %a, 0
br i1 %4, label %wf.exit, label %bb.nph.i
bb.nph.i: ; preds = %entry
%.promoted1.i = load i32* %1, align 4
%tmp12.i = add i32 %a, -1
%tmp13.i = zext i32 %tmp12.i to i33
%tmp14.i = add i32 %a, -2
%tmp15.i = zext i32 %tmp14.i to i33
%tmp16.i = mul i33 %tmp13.i, %tmp15.i
%tmp17.i = lshr i33 %tmp16.i, 1
%tmp18.i = trunc i33 %tmp17.i to i32
%tmp20.i = mul i32 %.promoted1.i, 5
%tmp21.i = add i32 %tmp20.i, -5
%tmp22.i = mul i3...
2007 Aug 16
2
[LLVMdev] Strange error of llvm-ld
> I think I have experienced this when more than one module
> contains definitions for the same values. ie. it should only
> be a declaration in one of them.
Hmm, when I compile and link this with plain gcc, it everything
works.
Anyway, llvm-ld should probably not just say "Cannot link
file 'blah'", but why it cannot link it.
I compiled llvm in with --enable-debug.
2010 Sep 29
3
[LLVMdev] spilling & xmm register usage
Hello everybody,
I have stumbled upon a test case (the attached module is a slightly
reduced version) that shows extremely reduced performance on linux
compared to windows when executed using LLVM's JIT.
We narrowed the problem down to the actual code being generated, the
source IR on both systems is the same.
Try compiling the attached module:
llc -O3 -filetype=asm -o BAD.s BAD.ll
Under
2008 May 08
0
[LLVMdev] Vector code
...ry);
StoreInst* void_20 = new StoreInst(float_tmp6, ptr_z, false, label_entry);
GetElementPtrInst* ptr_tmp10 = new GetElementPtrInst(ptr_x, const_int32_13,
"tmp10", label_entry);
LoadInst* float_tmp11 = new LoadInst(ptr_tmp10, "tmp11", false,
label_entry);
GetElementPtrInst* ptr_tmp13 = new GetElementPtrInst(ptr_y, const_int32_13,
"tmp13", label_entry);
LoadInst* float_tmp14 = new LoadInst(ptr_tmp13, "tmp14", false,
label_entry);
BinaryOperator* float_tmp15 = BinaryOperator::create(Instruction::Add,
float_tmp11, float_tmp14, "tmp15", label_entry);
....