search for: thumbed

Hi I would like to use clang to cross compile the ARM binary. I hope the target binary contains both arm and thumb instruction sets. I use the flag -mhwdiv=arm,thumb. I compiled several binaries. However, I found that the thumb mode instructions are few. Even for very big program like gcc. The number of thumb mode instruction is less than 100. I get the ground truth from the mapping table.

I was doing a laptop repair job today and needed to boot from a USB thumb drive, in order to free up the CD/DVD burner. Fortunately, the laptop to be repaired permitted one to boot from a USB thumb drive. However, there are still PCs out there that can't boot from a thumb drive (I have two), so I was wondering if it's pos to use the CHAIN module to boot from a thumb drive ? I looked at

Hi, I wanted to know if it was possible to force ARM backend to compile a function in ARM while the rest is in Thumb mode. I tried the attributes which is used in GCC but it doesn't work. Here is what I tried: https://pastebin.com/jCr5LPUY Thanks in advance, Uvekilledkenny -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi Koan, In general, this looks OK to me. Please split the patch into separate pieces, one for each issue you're addressing, though. From your description, it sounds like this should be 4 patches. That way we have a cleaner revision history in svn. -Jim On May 12, 2011, at 10:42 PM, Koan-Sin Tan wrote: > Hi, > > We are trying to use clang as a drop-in replacement for the gcc come

Thanks, Shankar. I needed to override all the places where st_value had been used, and it worked. But there another problem appeared: after correcting all atoms, I cannot distinguish between ARM and Thumb symbols in the further stages when fixing up relocations. I used to check targetVAddress (in terms of the relocation handler) since it contained 1 in the least bit when addressing Thumb

Hi, We are trying to use clang as a drop-in replacement for the gcc come with Android NDK. I found that MC/ELF doesn't not handle Thumb functions properly, e.g., bit 0 of the function name in the .symtab is not set to 1, and some thumb instructions are not generated correctly, e.g., the addresses for tBL/tBLX are not calculated right. With that attached patch, we can compile and run some

Hi, I just realized that clang produces Thumb-2 instruction in code even when older CPU type which doesn't suport Thumb-2 is specified. Here is output: # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c clang version 3.0 (http://llvm.org/git/clang.git 98138cdfdee05c0afbab2b209ce8cfe4a52474e1) Target: arm-unknown-freebsd Thread

splited patches and test cases mc-elf-thumbfunction-bit.diff: for 1 mc-elf-arm-backend-bl-blx-sign-bit.diff: for 2. mc-elf-thumb-bl-blx-relocation-table-entry.diff: for 3. mc-elf-cpu-xscale-attributes.diff: for 4. elf-thumbfunc.s: test case for 1 elf-thumbfunc-reloc.ll: test case for 2 and 3 elf-xscale-attribute.ll: test case for 4 On Fri, May 13, 2011 at 1:42 PM, Koan-Sin Tan <koansin.tan

Hi everyone, I'm working on some custom transformation passes that have the side-effect of significantly increasing the code size. While testing it on some larger, real-world code bases, I run into a linker error for armv7 thumb code. The particular error I get from ld64 is that "armv7 has no pc-rel bx thumb instruction." I've been able to reproduce the problem by taking a

Hi James, Thanks for the answer, can you elaborate on difference between thumb, thumb2, ARM, thumbv7. I'm a bit lost right now. When specifying thumbv7 llc will generate thumb only code, not thumb2 ? Best Regards Seb > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of James Molloy > Sent: Tuesday, May 29,

Hi Seb, The ARM instruction set is a fixed-width 32-bit instruction set that has been around since the early days of ARM. Modern (armv4t onwards) cores mostly have another instruction set that can be used in tandem, the "thumb" instruction set. This is a variable width (16 or 32 bit) instruction set that provides a subset of the ARM instruction set and was intended to provide the

Hi, Eli > Mmm... and I just realized I really can't help track this down because > the code paths in question are probably Linux-specific. I spent a I add the following line back to lib/Support/Unix/Host.inc, Arch = "arm"; And examples/HowToUseJIT works fine. Regards, chenwj [1] http://llvm.org/viewvc/llvm-project?view=rev&revision=131463 -- Wei-Ren Chen (陳韋任)

Hello: New to linux, and Centos. Can I plug thumb drive into computer, and download Centos directly to thumb drive, then move thumb drive to another desktop and use it like a "live CD" to install it on that computer? Thanks for any help. Tom

Hi all, I'm trying to figure out a problem with relocation types 1 and 8 (as observed using otool -r on ARM/Thumb object files). Earlier, when I used LLVM 2.8 with llc to generate thumb (-march=thumb -mattr=+thumb2) assembly listings, then assemble those using the gcc of iPhone 4.2 SDK, there wasn't any problem. However starting with LLVM 2.9, the same toolchain emits slightly different

On Oct 7, 2012, at 3:14 AM, Renato Golin <rengolin at systemcall.org> wrote: > On 5 October 2012 17:48, Jim Grosbach <grosbach at apple.com> wrote: >> The recent MachO data-in-code support should have fixed a lot of the problems. There's probably still some quirks in the specifics ($a vs. $t and making sure the symbols get into the ELF properly), but the core

Hi James, Thanks for the answer, for Cortex-A9 would you recommend to generate thumb2 code or ARM code ? What would be the best performance wise ? Best Regards Seb > -----Original Message----- > From: James Molloy [mailto:james.molloy at arm.com] > Sent: Thursday, May 31, 2012 9:57 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] llc support

Hi all, When I use Clang, I can add -mno-thumb to the command line and Clang generates pure Arm code without any use of Thumb instructions. However, I am messing about with the Glasgow Haskell Compiler (GHC) which generates LLVM IR code directly and then calls `opt` and `llc` on that IR code. The generated IR code currently has: target datalayout =

On Thu, 15 Nov 2018 at 14:18, Sjoerd Meijer <Sjoerd.Meijer at arm.com> wrote: > > Ahhh, typo in my previous mail: > > > > when I noticed that -Os gives me Thumb on Cortex-A{8,9,17} > > > I wanted to say: > > > when I noticed that "GCC -Os" gives me Thumb on Cortex-A{8,9,17} > > Yes. Just to clarify my response. That particular linaro

Hi Tim, Thank you for clarifying what the error actually means! I did read something about the BLX instruction but since I'm compiling strictly for thumb, it didn't make much sense to me. Adding -mdisable-tail-calls as a cc1 command indeed allowed me to link the generated binary. After looking some more at the ld64 source code, I came across the following comment: // The tail-call

Hello everyone, I want to generate machine code for target thumb, so run with bit code test.bc llc -march thumb test.bc -filetype obj -o test.o It doesn't generate test.o but show a message: "target doesn't support generation of this file type!" What's wrong? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: