search for: then11

...dge, %then %anotherFloat.1 = phi double [ %r_fmul8, %then ], [ %r_fmul5, %loop.endif_crit_edge ] ; <double> [#uses=1] %r_srem10 = srem i32 %lsr.iv, 16 ; <i32> [#uses=2] %r_icmpsgt = icmp sgt i32 %r_srem10, 10 ; <i1> [#uses=1] br i1 %r_icmpsgt, label %then11, label %endif.endif15_crit_edge endif.endif15_crit_edge: ; preds = %endif br label %endif15 then11: ; preds = %endif %phitmp = sitofp i32 %r_srem10 to double ; <double> [#uses=1] br label %endif15 endif15:...

...notherFloat.1 = phi double [ %r_fmul8, %then ], [ %r_fmul5, %loop.endif_crit_edge ] ; <double> [#uses=1] > %r_srem10 = srem i32 %lsr.iv, 16 ; <i32> [#uses=2] > %r_icmpsgt = icmp sgt i32 %r_srem10, 10 ; <i1> [#uses=1] > br i1 %r_icmpsgt, label %then11, label %endif.endif15_crit_edge > > endif.endif15_crit_edge: ; preds = %endif > br label %endif15 > > then11: ; preds = %endif > %phitmp = sitofp i32 %r_srem10 to double ; <double> [#uses=1] >...

...%n %tmp8 = load i32* %zero %tmp6 = icmp sgt i32 %tmp7, %tmp8 br i1 %tmp6, label %then4, label %else12 then4: %tmp14 = load i32* %i %tmp16 = load i32* %n %tmp18 = load i32* %inc %tmp15 = add i32 %tmp16, %tmp18 %tmp13 = icmp slt i32 %tmp14, %tmp15 br i1 %tmp13, label %then11, label %else12 then11: %tmp20 = load i32* %f %tmp22 = alloca i32 store i32 1 , i32* %tmp22 %tmp23 = load i32* %tmp22 %tmp24 = load i32* %i %tmp21 = add i32 %tmp24, %tmp23 store i32 %tmp21, i32* %i %tmp19 = mul i32 %tmp20, %tmp21 store i32 %tmp19, i32*...

...br i1 %tmp6, label %then4, label %else12 > > > > then4: > > %tmp14 = load i32* %i > > %tmp16 = load i32* %n > > %tmp18 = load i32* %inc > > %tmp15 = add i32 %tmp16, %tmp18 > > %tmp13 = icmp slt i32 %tmp14, %tmp15 > > br i1 %tmp13, label %then11, label %else12 > > > > then11: > > %tmp20 = load i32* %f > > %tmp22 = alloca i32 > > store i32 1 , i32* %tmp22 > > %tmp23 = load i32* %tmp22 > > %tmp24 = load i32* %i > > %tmp21 = add i32 %tmp24, %tmp23 > > store i32 %tmp21, i32* %...

...64 24, i64 24> %cmp10S38_D = icmp ugt <2 x i64> %sub.ptr.div.iS37_D, %splatInsMapS1_D.splat %zextS39_D = sext <2 x i1> %cmp10S38_D to <2 x i64> %BCS39_D = bitcast <2 x i64> %zextS39_D to i128 %mskS39_D = icmp ne i128 %BCS39_D, 0 br i1 %mskS39_D, label %if.then11, label %if.else It looks like %msk539_D is basically a test of whether either of the vector elements produced by the divide are ugt the spatInstMap. I can't say for sure that we can do better here - I haven't studied our vector canonicalization rules enough - but this seems like someth...

...ub.ptr.div.iS37_D, i32 1 %cmp10S38_D = icmp ugt <2 x i64> %sub.ptr.div.iS37_D, %splatInsMapS1_D.splat %zextS39_D = sext <2 x i1> %cmp10S38_D to <2 x i64> %BCS39_D = bitcast <2 x i64> %zextS39_D to i128 %mskS39_D = icmp ne i128 %BCS39_D, 0 br i1 %mskS39_D, label %if.then11, label %if.else -------------------------------------------- Assembly ----------------------------------------------------------------- # BB#3: # %if.then.i.i.i.i.i.i vpsllq $3, %xmm0, %xmm0 vpextrq $1, %xmm0, %rbx movq %rbx, %rdi vmovaps %xmm2,...

On 07/24/2015 03:42 AM, Benjamin Kramer wrote: >> On 24.07.2015, at 08:06, zhi chen <zchenhn at gmail.com> wrote: >> >> It seems that that it's hard to vectorize int64 in LLVM. For example, LLVM 3.4 generates very complicated code for the following IR. I am running on a Haswell processor. Is it because there is no alternative AVX/2 instructions for int64? The same thing

...%land.lhs.true, label %if.else115 land.lhs.true: ; preds = %while.end100 %399 = load i32* %outexpon.i, align 4, !tbaa !3 %add104 = add nsw i32 %399, %ndigits.addr.2 %cmp105 = icmp slt i32 %add104, 0 br i1 %cmp105, label %if.end109, label %land.lhs.true.if.then112_crit_edge land.lhs.true.if.then112_crit_edge: ; preds = %land.lhs.true %.pre303 = load i32* %decpt, align 4, !tbaa !3 br label %if.then112 if.end109: ; preds = %land.lhs.true store i8 0, i8* %arraydecay20, align 1, !tbaa !1 store i32 0...