search for: targetisellow

On Dec 1, 2008, at 8:53 AM, Matthijs Kooijman wrote: > Hi All, > > when looking through all the existing targets, I see that each of > them defines > <Target>ISelLowering.{cpp,h} files. However, they define a class > called > "<Target>TargetLowering" (though the comments in [at least some of] > those > files stay the define

Hi All, when looking through all the existing targets, I see that each of them defines <Target>ISelLowering.{cpp,h} files. However, they define a class called "<Target>TargetLowering" (though the comments in [at least some of] those files stay the define "<Target>ISelLowering". I suspect that this class was renamed at some time (which makes sense, since I

Hi All, I'm writing a backend for a target which only supports 4-byte, 4-byte-aligned loads and stores. I custom-lower all {*EXT}LOAD and STORE nodes in TargetISelLowering.cpp to take advantage of all alignment information available to the backend, rather than treat each load and store conservatively, which takes O(10) instructions. My target's allowsUnalignedMemoryOperations() always returns 'false', and the setOperationAction()s for i8,i16,i32...

On 08/11/2013 08:41 AM, Micah Villmow wrote: > How about this as a solution. > > Add one hook into TargetInstrInfo, and one into TargetISelLowering. > > 1) getAddressSpaceRelation(unsigned AS1, unsigned AS2) - Returns either disjoint, subset, superset, equal. Function defaults to equal. > 2) isAddressSpaceSupported(unsigned AS) - Returns true if supported, false otherwise. Function defaults to false for all non-zero AS. > &g...

On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson <johnso87 at crhc.illinois.edu> wrote: > Hi All, >     I'm writing a backend for a target which only supports 4-byte, > 4-byte-aligned loads and stores.  I custom-lower all {*EXT}LOAD and > STORE nodes in TargetISelLowering.cpp to take advantage of all alignment > information available to the backend, rather than treat each load and > store conservatively, which takes O(10) instructions.  My target's > allowsUnalignedMemoryOperations() always returns 'false', and the > setOperationAction()...

...gt; On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson > <johnso87 at crhc.illinois.edu> wrote: >> Hi All, >> I'm writing a backend for a target which only supports 4-byte, >> 4-byte-aligned loads and stores. I custom-lower all {*EXT}LOAD and >> STORE nodes in TargetISelLowering.cpp to take advantage of all alignment >> information available to the backend, rather than treat each load and >> store conservatively, which takes O(10) instructions. My target's >> allowsUnalignedMemoryOperations() always returns 'false', and the >> setO...

How about this as a solution. Add one hook into TargetInstrInfo, and one into TargetISelLowering. 1) getAddressSpaceRelation(unsigned AS1, unsigned AS2) - Returns either disjoint, subset, superset, equal. Function defaults to equal. 2) isAddressSpaceSupported(unsigned AS) - Returns true if supported, false otherwise. Function defaults to false for all non-zero AS. These could be used by...

On Sun, Aug 11, 2013 at 5:49 AM, Michele Scandale < michele.scandale at gmail.com> wrote: > On 08/11/2013 08:41 AM, Micah Villmow wrote: > > How about this as a solution. > > > > Add one hook into TargetInstrInfo, and one into TargetISelLowering. > > > > 1) getAddressSpaceRelation(unsigned AS1, unsigned AS2) - Returns either > disjoint, subset, superset, equal. Function defaults to equal. > > 2) isAddressSpaceSupported(unsigned AS) - Returns true if supported, > false otherwise. Function defaults to false for a...

...PM, Matt Johnson >> <johnso87 at crhc.illinois.edu>  wrote: >>> >>> Hi All, >>>     I'm writing a backend for a target which only supports 4-byte, >>> 4-byte-aligned loads and stores.  I custom-lower all {*EXT}LOAD and >>> STORE nodes in TargetISelLowering.cpp to take advantage of all alignment >>> information available to the backend, rather than treat each load and >>> store conservatively, which takes O(10) instructions.  My target's >>> allowsUnalignedMemoryOperations() always returns 'false', and the &...

Hi everyone, How would you pass a string container from TargetISelLowering phase to the TargetInstPrinter phase? May be I have missed something essential, but currently seems they don't have shared class or something like that, and currently I am thinkin to initialize container in TargetTargetMachine, then pass it to the TargetInstPrinter using TargetMCAsmInfo c...

Hi everyone, I have the following code (as part of a larger function): %0 = icmp eq i16 %a, 0 ; <i1> [#uses=1] br i1 %0, label %bb1, label %bb I would like to match this with a BRCOND, but all I get is an error message when compiling the above code that say: LLVM ERROR: Cannot yet select: 0x170f200: ch = br_cc 0x170f000, 0x170ed00, 0x170dc60, 0x170ec00, 0x170ef00 [ID=19]

...:49 AM, Michele Scandale <michele.scandale at gmail.com > <mailto:michele.scandale at gmail.com>> wrote: > > On 08/11/2013 08:41 AM, Micah Villmow wrote: > > How about this as a solution. > > > > Add one hook into TargetInstrInfo, and one into TargetISelLowering. > > > > 1) getAddressSpaceRelation(unsigned AS1, unsigned AS2) - Returns either > disjoint, subset, superset, equal. Function defaults to equal. > > 2) isAddressSpaceSupported(unsigned AS) - Returns true if supported, false > otherwise. Function def...

Shortening the email chain. > Using this example or another equivalent example can you explain me what is > your variant of the solution? How would you solve the current absence of > information in the case of X86 target? [Micah Villmow] I understand what you are trying to do. I don't see the need, only added complexity for little gain, to involve the backends. Everything you are