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mytargetdagtodagisel
2014 Aug 01
2
[LLVMdev] BR_CC questions
I am implementing a new backend and am pretty sure I don't quite understand "the way" one is supposed to implement conditional branches.
My target CPU natively supports a conditional branch instruction that accepts a condition to test (equal, less than, etc.), two operands (two registers, or one register and one immediate), and finally a target PC to branch to if the comparison