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2014 Sep 30
2
[LLVMdev] Behaviour of NVPTX intrinsic
...latile i16* %I_1
%T_2 = load volatile i16* %I_2
%T_3 = load volatile i16* %I_3
call void @llvm.nvvm.barrier0()
%T_5 = add i16 %T_1, %T_3
call void @llvm.nvvm.barrier0()
%T_7 = mul i16 %T_0, %T_2
%T_8 = xor i16 %T_2, %T_0
%T_9 = mul i16 %T_0, %T_1
call void @llvm.nvvm.barrier0()
%T_11 = sub i16 %T_7, %T_5
%T_12 = add i16 %T_8, %T_9
%T_13 = add i16 %T_11, %T_12
store volatile i16 %T_13, i16* %O_0
ret void
}
;declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()
declare void @llvm.nvvm.barrier0()
output
---------
define void @test(i16* nocapture %I_0, i16* nocapture %I_1, i16* no...
2014 Sep 30
2
[LLVMdev] Behaviour of NVPTX intrinsic
is there any guarantee that the nvptx intrinsic "llvm.nvvm.barrier0" will
not be moved around by opt ?
In other words, can I expect all the instructions above
"llvm.nvvm.barrier0" to remain above it and those below it to remain below,
after all the opt passes are run ?
If that is not the case, is there a way to define such an intrinsic ?
Thanks.
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