search for: t11

Displaying 20 results from an estimated 73 matches for "t11".

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2009 Sep 29
1
How to parsing data like this in R
Hi, R-users, I met a problem: Items:[Anna 'moi =) akku loppu joskus 4ltä. Kestää kauan nää..'\tAmer, Tuusula (0:20)\t20\t12\t16\t00\t00\t11]/Anne 'Ei jakoa,uus päivä muistio et 4n niin peruin. Hups'\t (0:16)\t0\t12\t18\t00\t00\t11/Elina 'Konsertissa. En tod. vastaa teille'\tEtu-Töölö, Helsinki (2:40)\t24\t12\t18\t00\t00\t11 I want to parsing the above data into the below according to each "/": [Anna '...
2016 Jul 29
2
Help with ISEL matching for an SDAG
...has 9 nodes: t0: ch = EntryToken t2: i64,ch = CopyFromReg t0, Register:i64 %vreg0 t16: i32,ch = load<LD1[%ptr](tbaa=<0x10023c9f448>), anyext from i8> t0, t2, undef:i64 t15: v16i8 = BUILD_VECTOR t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16, t16 t11: ch,glue = CopyToReg t0, Register:v16i8 %V2, t15 t12: ch = PPCISD::RET_FLAG t11, Register:v16i8 %V2, t11:1 and the following pattern that I'd like to match: def ScalarLoads { dag Li8 = (i32 (extloadi8 xoaddr:$src)); } def : Pat<(v16i8 (build_vector ScalarLoads.Li8, ScalarLoads.Li8,...
2017 Dec 14
1
change in behavior of c.trellis
> library(latticeExtra) Loading required package: lattice Loading required package: RColorBrewer > t11 <- xyplot(1 ~ 1) > t11 > c(t11, t11) Warning message: In formals(fun) : argument is not a function > version _ platform x86_64-w64-mingw32 arch x86_64 os mingw32 system x86_64, mingw32 status Patched major 3 minor...
2017 Feb 14
2
Ensuring chain dependencies with expansion to libcalls
...emonstrates the problem. t0: ch = EntryToken t2: i64,ch,glue = CopyFromReg t0, Register:i64 %reg0 t4: i64,ch,glue = CopyFromReg t2:1, Register:i64 %reg1, t2:1 t6: i64,ch,glue = CopyFromReg t4:1, Register:i64 %reg2, t4:1 t8: i64,ch,glue = CopyFromReg t6:1, Register:i64 %reg3, t6:1 t11: ch = CopyToReg t0, Register:i64 %vreg0, t2 t13: ch = CopyToReg t0, Register:i64 %vreg1, t4 t15: ch = CopyToReg t0, Register:i64 %vreg2, t8 t26: ch = TokenFactor t11, t13, t15, t2:1, t4:1, t6:1, t8:1 t16: i64 = sdiv t2, t4 Before legalization, there is a single sdiv nod...
2012 Aug 29
4
Sorting of columns of a matrix
Dear all, Please suggest me how can I do it. I have a matrix which look like following: x1 x2 x3 t1 .01 0.3 0 t2 0 0.1 0.01 t3 0 .01 .01 t4 0 0 t5 5 0 0 t6 0 0 0 t7 0 0 0 t8 0 0 0 t9 0.6 0 0 t10 0 0 0.66 t11 0 0.6 0.11 t12 0 0.4 0 I want to sort decreasing order in each column based on rows. and then to display only those rows which has a value. The expected out put matrix will look like x1 x2 x3 t9 0.6 t11 0.6 t10 0.66 t1 .01 t12 0.4 t11 0.11 t1 0.3 t2 .01 t2 0.1 t3 .01 many thanks Nico...
2009 Oct 14
14
ZFS disk failure question
...d0 ONLINE 0 0 0 c8t4d0 ONLINE 0 0 0 c8t5d0 ONLINE 0 0 0 c8t6d0 ONLINE 0 0 0 spare DEGRADED 0 0 0 c8t7d0 REMOVED 0 0 0 c8t11d0 ONLINE 0 0 0 c8t8d0 ONLINE 0 0 0 c8t9d0 ONLINE 0 0 0 c8t10d0 ONLINE 0 0 0 spares c8t11d0 INUSE currently in use Since it''s not obvious, the spare line had b...
2017 Sep 14
2
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
...and the SelectionDAG before TypeLegalizer is like this. t0: ch = EntryToken t2: i32,ch = CopyFromReg t0, Register:i32 %vreg0 t3: ch = ValueType:i32 t5: i32,ch = CopyFromReg t2:1, Register:i32 %vreg1 t7: i32 = AssertZext t5, ValueType:ch:i1 t8: v2i32 = BUILD_VECTOR t2, t7 t11: v2i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<-23> t15: i32,ch = CopyFromReg t0, Register:i32 %vreg2 t22: i32 = add t15, Constant:i32<1> t24: ch = CopyToReg t0, Register:i32 %vreg3, t22 t27: ch = CopyToReg t0, Register:i32 %vreg8, Constant:i32...
2009 Dec 10
1
incorrect multiple outputs
...288 reformatted lines for each original data file ... >for (k in 1:file.rows){ # iterates code for each 288 line block of "input_file.txt" ... >cv[k] <- 100*(sd(x.blank)/mean(x.blank)) >t[k] <- (mean(x.note)-mean(x.blank))/sqrt(((sd(x.note)^2)/8)+((sd(x.blank)^2)/16)) >t11[k] <- (sqrt(8)*(mean(x.note11)-mean(x.blank)))/sqrt(sd(x.note11)^2+sd(x.blank)^2) >} > >all.data<-data.frame(barcodes,t=format(as.numeric(t),digits=3),t11=format(as.numeric(t11),digits=3),cv=format(as.numeric(cv),digits=3)) >write.table(all.data, file= "R_drug_plot.log",...
2010 Jan 12
1
parsing protocol of states
...8 <- substr(str02[x8], 1, 19) t8 <- as.POSIXct(strptime(t8, "%Y-%m-%d %H:%M:%S")) t9 <- substr(str02[x9], 1, 19) t9 <- as.POSIXct(strptime(t9, "%Y-%m-%d %H:%M:%S")) t10 <- substr(str02[x10], 1, 19) t10 <- as.POSIXct(strptime(t10, "%Y-%m-%d %H:%M:%S")) t11 <- substr(str02[x11], 1, 19) t11 <- as.POSIXct(strptime(t11, "%Y-%m-%d %H:%M:%S")) as.numeric(difftime(t11, t1, units="days")) ## waiting times between state E and F sum(as.numeric(difftime(t5, t4, units="days"))) best regards Andreas
2007 Mar 01
2
[LLVMdev] Version 1.9 SSA form question
...t3 = shr uint %param.x, ubyte 1 ; <uint> [#uses=1] %.t4 = or uint %.t3, %param.x ; <uint> [#uses=2] %.t7 = shr uint %.t4, ubyte 2 ; <uint> [#uses=1] %.t8 = or uint %.t7, %.t4 ; <uint> [#uses=2] %.t11 = shr uint %.t8, ubyte 4 ; <uint> [#uses=1] %.t12 = or uint %.t11, %.t8 ; <uint> [#uses=2] %.t15 = shr uint %.t12, ubyte 8 ; <uint> [#uses=1] %.t16 = or uint %.t15, %.t12 ; <uint> [#uses=2] %.t19 = shr u...
2017 Sep 15
2
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
...Legalizer is like this. > > t0: ch = EntryToken > t2: i32,ch = CopyFromReg t0, Register:i32 %vreg0 > t3: ch = ValueType:i32 > t5: i32,ch = CopyFromReg t2:1, Register:i32 %vreg1 > t7: i32 = AssertZext t5, ValueType:ch:i1 > t8: v2i32 = BUILD_VECTOR t2, t7 > t11: v2i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<-23> > t15: i32,ch = CopyFromReg t0, Register:i32 %vreg2 > t22: i32 = add t15, Constant:i32<1> > t24: ch = CopyToReg t0, Register:i32 %vreg3, t22 > t27: ch = CopyToReg t0, Register:i32 %vre...
2019 Jun 26
2
How to handle ISD::STORE when both operands are FrameIndex?
...i32<3>, undef:i32 ISEL: Starting pattern match Initial Opcode index to 4 Morphed node: t14: ch = StoreStackF<Mem:(store 4 into %ir.p45, align 8, addrspace 1)> FrameIndex:i32<2>, TargetFrameIndex:i32<3>, t10 ISEL: Match complete! ... ISEL: Starting selection on root node: t11: i32 = FrameIndex<2> ISEL: Starting pattern match Initial Opcode index to 0 Match failed at index 0 LLVM ERROR: Cannot select: t11: i32 = FrameIndex<2> > Cheers. > > Tim. > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://list...
2017 Sep 21
1
VSelect Instruction Error
Hello, I am getting this error. What instruction is required to be implemented? LLVM ERROR: Cannot select: t22: v32i32 = vselect t724, t11, t16 t724: v32i32,ch = load<LD128[FixedStack1]> t723, FrameIndex:i64<1>, undef:i64 t659: i64 = FrameIndex<1> t10: i64 = undef t11: v32i32,ch = load<LD128[%sunkaddr45](align=4)(tbaa=<0x481f1e8>)> t0, t8, undef:i64 t8: i64 = add t7, Constant:i64<4>...
2017 Jul 08
2
Error in v64i32 type in x86 backend
...o. but still my instruction is not selected when i run input file in debug mode; getting following errors; ===== Instruction selection begins: BB#1 'vector.body' Selecting: t9: ch = store<ST256[bitcast ([65 x i32]* @c to <64 x i32>*)](align=16)(tbaa=<0x3817578>)> t8, t7, t11, undef:i64 ISEL: Starting pattern match on root node: t9: ch = store<ST256[bitcast ([65 x i32]* @c to <64 x i32>*)](align=16)(tbaa=<0x3817578>)> t8, t7, t11, undef:i64 Skipped scope entry (due to false predicate) at index 14, continuing at 81 Skipped scope entry (due to fals...
2009 Apr 18
4
Loop question
.... Here is what I thought at first: t1<-matrix(0, nrow=250, ncol=1) for(i in 1:10){ t1[i]<-rnorm(250) } What I intended was that the loop would create 10 different matrices with a single column of 250 values randomly selected from a normal distribution, and that they would be labeled t11, t12, t13, t14 etc. Can anyone steer me in the right direction with this one? Thanks! Brendan
2006 Jun 27
1
Boxplot questions.
Dear all, I am having a data for 2 different treatments with different time points. So, I used the following code to plot the boxplot and also to do anova. T11 <- c(280, 336, 249, 277, 429) T12 <- c(400, 397, 285, 407, 313) T13 <- c(725, 373, 364, 706, 249) T21 <- c(589, 257, 466, 248, 913) T22 <- c(519, 424, 512, 298, 907) T23 <- c(529, 479, 634, 354, 1015) obs <- c(T11, T12, T13, T21, T22, T23) treat <- c(rep("T1",15)...
2017 Jul 08
2
Error in v64i32 type in x86 backend
...tting following errors; >>>> >>>> >>>> ===== Instruction selection begins: BB#1 'vector.body' >>>> Selecting: t9: ch = store<ST256[bitcast ([65 x i32]* @c to <64 x >>>> i32>*)](align=16)(tbaa=<0x3817578>)> t8, t7, t11, undef:i64 >>>> >>>> ISEL: Starting pattern match on root node: t9: ch = store<ST256[bitcast >>>> ([65 x i32]* @c to <64 x i32>*)](align=16)(tbaa=<0x3817578>)> t8, t7, >>>> t11, undef:i64 >>>> >>>> Skipped s...
2017 Sep 17
2
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
...nd the SelectionDAG before TypeLegalizer is like this. t0: ch = EntryToken t2: i32,ch = CopyFromReg t0, Register:i32 %vreg0 t3: ch = ValueType:i32 t5: i32,ch = CopyFromReg t2:1, Register:i32 %vreg1 t7: i32 = AssertZext t5, ValueType:ch:i1 t8: v2i32 = BUILD_VECTOR t2, t7 t11: v2i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<-23> t15: i32,ch = CopyFromReg t0, Register:i32 %vreg2 t22: i32 = add t15, Constant:i32<1> t24: ch = CopyToReg t0, Register:i32 %vreg3, t22 t27: ch = CopyToReg t0, Register:i32 %vreg8, Constant:i32...
2018 Dec 18
2
In ISel, where Constant<0> comes from?
...nitial selection DAG: %bb.0 'main:entry' SelectionDAG has 18 nodes: t0: ch = EntryToken t7: i64 = Constant<0> t9: ch = store<(store 4 into %ir.retval)> t0, Constant:i32<0>, FrameIndex:i64<0>, undef:i64 t2: i32,ch = CopyFromReg t0, Register:i32 %0 t11: ch = store<(store 4 into %ir.argc.addr)> t9, t2, FrameIndex:i64<1>, undef:i64 t4: i64,ch = CopyFromReg t0, Register:i64 %1 t13: ch = store<(store 8 into %ir.argv.addr)> t11, t4, FrameIndex:i64<2>, undef:i64 t16: ch,glue = CopyToReg t13, Register:i32 $eax, Constant:...
2017 Jul 08
5
Error in v64i32 type in x86 backend
...Instruction selection begins: BB#1 'vector.body' >>>>>>>>>>>>>> Selecting: t9: ch = store<ST256[bitcast ([65 x i32]* @c to >>>>>>>>>>>>>> <64 x i32>*)](align=16)(tbaa=<0x3817578>)> t8, t7, t11, >>>>>>>>>>>>>> undef:i64 >>>>>>>>>>>>>> >>>>>>>>>>>>>> ISEL: Starting pattern match on root node: t9: ch = >>>>>>>>>>>>>> store&lt...