Displaying 4 results from an estimated 4 matches for "t4_u16".
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2011 May 11
3
[LLVMdev] [LLVMDev] Add not instruction to PTX backend
...as
you suggested before.
multiclass PTX_LOGIC_2OP<string opcstr,PatFrag opnode> {
...
}
Now I am trying to write test case for logic and shift
operations. But I have a trouble in mapping LLVM IR to PTX
IR for "not" instruction. The test case I wrote is,
define ptx_device i16 @t4_u16(i16 %x) {
; CHECK: not.b16 rh0, rh1, rh2;
; CHECK-NEXT: ret;
%z = xor i16 %x, 1
ret i16 %z
}
Since LLVM IR doesn't support logical not directly, I use "xor i16 %x, 1"
to represent logical not in LLVM IR. It turns out the IR is mapped to
PTX "xor" not PTX "not"...
2011 May 12
0
[LLVMdev] [LLVMDev] Add not instruction to PTX backend
...TX_LOGIC_2OP<string opcstr,PatFrag opnode> {
> ...
> }
>
> Now I am trying to write test case for logic and shift
> operations. But I have a trouble in mapping LLVM IR to PTX
> IR for "not" instruction. The test case I wrote is,
>
> define ptx_device i16 @t4_u16(i16 %x) {
> ; CHECK: not.b16 rh0, rh1, rh2;
> ; CHECK-NEXT: ret;
> %z = xor i16 %x, 1
> ret i16 %z
> }
>
> Since LLVM IR doesn't support logical not directly, I use "xor i16 %x, 1"
> to represent logical not in LLVM IR. It turns out the IR is mapped to
>...
2011 May 09
0
[LLVMdev] [LLVMDev] Add not instruction to PTX backend
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陳韋任 wrote:
<blockquote cite="mid:20110509013918.GA13760@cs.nctu.edu.tw" type="cite">
2011 May 09
3
[LLVMdev] [LLVMDev] Add not instruction to PTX backend
Hi, Justin
> We're been writing multiclasses for each unique type of instruction. The
> current PTX_LOGIC version is for 3-operand instructions. A new multiclass
> needs to be created for 2-operand logic instructions.
I am trying to add a multiclass for 2-operand logic instructions. For
example,
multiclass PTX_LOGIC_2OP<string opcstr, SDNode opnode> {
def ripreds :