search for: switchinsts

Displaying 20 results from an estimated 49 matches for "switchinsts".

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2015 Jul 24
2
[LLVMdev] Transforming SwitchInst to BranchInst
Hi, Are there some built-in LLVM transformation pass, or written library code that transforms LLVM::SwitchInst into if-condition statements (LLVM:: BranchInst)? The purpose of the transformation is that we have a legacy program analyzer that includes an LLVM pass manipulating if-condition statements. Statements of LLVM::SwithchInst should have been handled in the same manner but was not done.
2006 May 17
0
[LLVMdev] Obfuscation with LLVM
Hi all, I was trying to implement an obfuscation tool for C-code on the basis of LLVM. I got a prototype of the simple obfuscation transformation which converting control flow graph to something like a state machine. I am not sure I will have time to work on extending further this tool with new transformations like opaque predicates and decided to put here source code I have by now with hope
2011 Jul 31
3
[LLVMdev] SwitchInst::addCase with BlockAddress
I'm trying to figure out how to feed a blockaddress to a switch condition AND destination (basically emulating an indirectbr via a switch; I know it's not a good approach, I'm just experimenting). Suppose I have the following: SwitchInst *s = SwitchInst::Create(...); BasicBlock *bb = ...; PtrToIntInst k = new PtrToIntInst(BlockAddress::get(bb), <TYPE>, "", s);
2011 Aug 01
0
[LLVMdev] SwitchInst::addCase with BlockAddress
On Sun, Jul 31, 2011 at 7:36 AM, Carlo Alberto Ferraris <cafxx at strayorange.com> wrote: > I'm trying to figure out how to feed a blockaddress to a switch condition > AND destination (basically emulating an indirectbr via a switch; I know it's > not a good approach, I'm just experimenting). > Suppose I have the following: > > SwitchInst *s =
2012 Feb 27
3
[LLVMdev] SwitchInst handling in backend
Hi, if I want to know how switch instructions are handled in the backend, where do I have to look first? I'm not familiar with the backend framework and I couldn't figure out the interface between the LLVM instruction 'SwitchInst' and whatever there is in the backend. I would be very happy about every hint where I have to look to find the entry point of switch instructions in the
2011 Aug 01
1
[LLVMdev] SwitchInst::addCase with BlockAddress
Nella citazione lunedì 1 agosto 2011 08:13:12, Eli Friedman ha scritto: > On Sun, Jul 31, 2011 at 7:36 AM, Carlo Alberto Ferraris > <cafxx at strayorange.com> wrote: >> I'm trying to figure out how to feed a blockaddress to a switch condition >> AND destination (basically emulating an indirectbr via a switch; I know it's >> not a good approach, I'm just
2012 Feb 27
0
[LLVMdev] SwitchInst handling in backend
On Mon, Feb 27, 2012 at 12:52 PM, Nico <listiges at arcor.de> wrote: > Hi, > > if I want to know how switch instructions are handled in the backend, where do I have to look first? > I'm not familiar with the backend framework and I couldn't figure out the interface between the LLVM instruction 'SwitchInst' and whatever there is in the backend. > > I would be
2013 Aug 22
2
[LLVMdev] SwitchInst problem
Hi All, Value* V; Value* V2; BasicBlock * BB; unsigned j; ///number of cases .... //insert V , V2, j and BB SwitchInst* sw= builder.CreateSwitch(V, BB, j); ConstantInt * CI= dyn_cast<ConstantInt>(V2); sw-> addCase( CI , BB); At last step there is Program received signal SIGSEGV, Segmentation fault. What is wrong in the code? Thanks in advance -- * Rasha Salah Omar
2012 Nov 29
2
[LLVMdev] [cfe-dev] UB in TypeLoc casting
Moving to LLVM dev to discuss the possibility of extending the cast infrastructure to handle this. On Tue, Nov 20, 2012 at 5:51 PM, John McCall <rjmccall at apple.com> wrote: > On Nov 18, 2012, at 5:05 PM, David Blaikie <dblaikie at gmail.com> wrote: >> TypeLoc casting looks bogus. >> >> TypeLoc derived types return true from classof when the dynamic type >>
2018 Jul 15
2
llvm pass is very slow
Hi I write a LLVM function pass. The pass will loop the basicblock in the function, check the instruction's type with dyn_cast<switchinst>, print the instruction and the basicblock's successors. I think it is not very complex. My bitcode file is about 30M. My CPU is i7-7700(3.6GHz). It has been running for 60 hours but it is still running. I am not sure whether this is a normal
2012 Nov 30
0
[LLVMdev] [cfe-dev] UB in TypeLoc casting
On Thu, Nov 29, 2012 at 3:49 PM, David Blaikie <dblaikie at gmail.com> wrote: > Moving to LLVM dev to discuss the possibility of extending the cast > infrastructure to handle this. > > On Tue, Nov 20, 2012 at 5:51 PM, John McCall <rjmccall at apple.com> wrote: >> On Nov 18, 2012, at 5:05 PM, David Blaikie <dblaikie at gmail.com> wrote: >>> TypeLoc
2011 Nov 03
1
[LLVMdev] [LLVM] LoopUnswitch + SwitchInst
Hi all. By now loops with switch instruction are unswitched value-by-value. For example for case range [0..9] we need to run unswitch process 10 times! I want try to optimize that case. Is there any hidden problems that blocks this improvement? Regards, Stepan.
2012 Feb 27
2
[LLVMdev] SwitchInst handling in backend
Hi Eli, Thank you for the quick reply. On Feb 27, 2012, at 10:03 PM, Eli Friedman wrote: > SelectionDAGBuilder::visitSwitch is the general switch lowering... I understand this lowering is target independent and there is no additional target dependent handling of switch instructions - right? Only branches and jump tables are left after this lowering? Kind regards, Nico
2013 Aug 22
0
[LLVMdev] SwitchInst problem
Hi Rasha, > What is wrong in the code? Your best bet is to run a debugger and see if the variables have values you expect just before that last call, and then look at what's causing the segfault in LLVM (null pointer?) code and work out where the first place it's not doing what you expect is. Cheers. Tim.
2005 Jul 27
2
[LLVMdev] Making a pass available to llc?
On 7/26/05, Reid Spencer <reid at x10sys.com> wrote: > On Tue, 2005-07-26 at 17:25 -0700, Michael McCracken wrote: > > > Since I'm modifying llc, I have a couple small questions about that code: > > > > opt and analyze (and a couple of other places) add a verifier pass, > > but llc doesn't. > > This would seem to make sense for llc as well -
2010 Oct 07
2
[LLVMdev] [Q] x86 peephole deficiency
Hi all, I am slowly working on a SwitchInst optimizer (http://llvm.org/PR8125) and now I am running into a deficiency of the x86 peephole optimizer (or jump-threader?). Here is what I get: andl $3, %edi je .LBB0_4 # BB#2: # %nz # in Loop: Header=BB0_1 Depth=1 cmpl $2, %edi
2005 Jul 27
0
[LLVMdev] Making a pass available to llc?
On Tue, 26 Jul 2005, Michael McCracken wrote: >> I can't see any harm in that. However, please make sure that it really >> isn't being run. The verifier can be hidden by various levels of >> abstraction. > > Assuming that I get everything with -debug-pass=Structure, then it isn't: -debug-pass=Structure does list everything. If you add it, please add it in an
2016 Nov 15
2
In LLVM IR, how can I determine if a switch statement had an explicit default case?
Since a SwitchInst always has a default case even if no default case appeared in the code, what's the best way to determine if it's explicit or implicit? thanks.. don -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161114/7b2965db/attachment.html>
2005 Jul 27
1
[LLVMdev] Making a pass available to llc?
Attached is my patch that adds a (debug build only) verifier pass and support for creating passes specified on the command line to llc. Let me know if it needs changes to be acceptable. One thing I noticed is that (eg.) opt and analyze have their options and globals in an anonymous namespace while llc doesn't. I just used llc's convention - which is preferable? As to testing - It works
2010 Oct 07
0
[LLVMdev] [Q] x86 peephole deficiency
On Oct 6, 2010, at 6:16 PM, Gabor Greif wrote: > Hi all, > > I am slowly working on a SwitchInst optimizer (http://llvm.org/PR8125) > and now I am running into a deficiency of the x86 > peephole optimizer (or jump-threader?). Here is what I get: > > > andl $3, %edi > je .LBB0_4 > # BB#2: # %nz >