Displaying 2 results from an estimated 2 matches for "susccessfuly".
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2015 Sep 07
2
POssible bug in the Arm code generator
...issed that.
>
>> A possible reason for an illegal instruction exception is that you have
>> generated some ARM code and tried to execute it as Thumb or vise-versa.
> Well, I'm getting SIGILL, but GHC does not generate or use thumb instructions
> and the SIGILL happens after susccessfuly running a bunch of other arm
> instructions. From GDB:
>
> Program received signal SIGILL, Illegal instruction.
> 0x03ff9dbc in stg_ap_v_fast ()
> (gdb) bt
> #0 0x03ff9dbc in stg_ap_v_fast ()
> #1 0x03fc6ce6 in StgRun (f=0x3ff9db4 <stg_ap_v_fast>, basereg...
2015 Sep 06
2
POssible bug in the Arm code generator
Hi all,
I do a little work on the Glasgow Haskell Compiler (GHC) which uses
LLVM for the backend when compiling for Arm and some other targets.
The reason I am posting to this list is that a GHC compiled program
(using the LLVM backend) is getting an illegal instruction exception
on the this instruction:
ldr r0, [r0]
According to the Arm archtecture manual: