Displaying 9 results from an estimated 9 matches for "stwx".
Did you mean:
stw
2012 May 02
4
[LLVMdev] [cfe-dev] Odd PPC inline asm constraint
...second wart is the dead copy to r31...which leads to the
unnecessary save and restore of r31.
For tomcatv, we have to basically save/restore the entire set
of non-volatile integer and fp registers. Looking at how
llvm does that shows:
...
lis 3, 56
ori 3, 3, 57680
stwx 16, 31, 3
lis 3, 56
ori 3, 3, 57684
stwx 17, 31, 3
lis 3, 56
ori 3, 3, 57688
stwx 18, 31, 3
lis 3, 56
ori 3, 3, 57692
stwx 19, 31, 3
lis 3, 56
ori 3, 3, 57696
stwx 20, 31, 3
lis 3, 56
ori...
2012 May 02
0
[LLVMdev] [cfe-dev] Odd PPC inline asm constraint
On Tue, 2012-05-01 at 17:47 -0500, Hal Finkel wrote:
> By default it should build for
> whatever the current host is (no special flags required). To
> specifically build for something else, use:
> -ccc-host-triple powerpc64-unknown-linux-gnu
> or
> -ccc-host-triple powerpc-unknown-linux-gnu
So LLVM isn't biarch capable? Meaning one LLVM compiler cannot
generate both
2012 May 12
0
[LLVMdev] [cfe-dev] Odd PPC inline asm constraint
...to the
> unnecessary save and restore of r31.
>
> For tomcatv, we have to basically save/restore the entire set
> of non-volatile integer and fp registers. Looking at how
> llvm does that shows:
>
> ...
> lis 3, 56
> ori 3, 3, 57680
> stwx 16, 31, 3
> lis 3, 56
> ori 3, 3, 57684
> stwx 17, 31, 3
> lis 3, 56
> ori 3, 3, 57688
> stwx 18, 31, 3
> lis 3, 56
> ori 3, 3, 57692
> stwx 19, 31, 3
> lis 3, 56
> ori 3, 3, 576...
2012 May 01
4
[LLVMdev] [cfe-dev] Odd PPC inline asm constraint
On Tue, 01 May 2012 17:23:07 -0500
Peter Bergner <bergner at vnet.ibm.com> wrote:
> On Tue, 2012-05-01 at 16:06 -0500, Hal Finkel wrote:
> > LLVM/clang now will build in the normal way (./configure; make
> > install) on PPC (you'll need at least the 3.1 release candidate (or
> > trunk)). I generally build on my PPC64 hosts with:
> > make ENABLE_OPTIMIZED=1
2004 May 09
0
[LLVMdev] Testing LLVM on OS X
...rray$non_lazy_ptr-"L00000000001$pb")
> li r2,0
> lwz r9,lo16(L_Array$non_lazy_ptr-"L00000000001$pb")(r4)
> li r4,1000
> mtctr r4
> L9:
> lwzx r7,r2,r9 ; load
> add r6,r7,r3 ; add
> stwx r6,r2,r9 ; store
> addi r2,r2,4 ; Increment pointer
> bdnz L9 ; Decrement count register, branch while not zero
> blr
>
> This is nice code, good GCC. :)
Okay, I changed the C backend to emit syntactic loops around the real...
2004 May 04
0
[LLVMdev] Testing LLVM on OS X
On Tue, 4 May 2004, Patrick Flanagan wrote:
> I was able to run through all the C/C++ benchmarks in SPEC using LLVM.
> I'm on OS X 10.3.3. I did a quick comparison between LLVM (latest from
> CVS as of 4/27) and gcc 3.3 (Apple's build 20030304). For simplicity's
> sake, the only flag I used was -O3 for each compiler and I was using
> the C backend to generate native
2004 May 04
2
[LLVMdev] Testing LLVM on OS X
I was able to run through all the C/C++ benchmarks in SPEC using LLVM.
I'm on OS X 10.3.3. I did a quick comparison between LLVM (latest from
CVS as of 4/27) and gcc 3.3 (Apple's build 20030304). For simplicity's
sake, the only flag I used was -O3 for each compiler and I was using
the C backend to generate native code for PPC.
Most of the LLVM results were close to gcc
2009 Apr 22
0
[LLVMdev] a very strange question about adding new instrinsic.
...--------------===//
I insert them in mycase.ll
//===--------------------===//
call void
@llvm.ppc.mytest()
...
declare void @llvm.ppc.mytest(...) nounwind
//===--------------------===//
then : llvm-as mycase.ll -o mycase.bc
llc -march=ppc32 mycase.bc -o mycase.s
I get in mycase.s :
stwx 4, 5, 3
62 la 3, .str at l(8)
63 mytest <----my test instruction.
64 creqv 0, 0, 0
65 li 30, 0
BUT when I implement them to my target, llc error:
llc:
/backup/AndesCC/llvm/include/llvm/Support/Casting.h:199: typename
llvm::cast_retty<To, From>::ret_typ...
2004 May 04
6
[LLVMdev] Testing LLVM on OS X
...mtlr r5
addis r4,r2,ha16(L_Array$non_lazy_ptr-"L00000000001$pb")
li r2,0
lwz r9,lo16(L_Array$non_lazy_ptr-"L00000000001$pb")(r4)
li r4,1000
mtctr r4
L9:
lwzx r7,r2,r9 ; load
add r6,r7,r3 ; add
stwx r6,r2,r9 ; store
addi r2,r2,4 ; Increment pointer
bdnz L9 ; Decrement count register, branch while not zero
blr
This is nice code, good GCC. :)
Okay, LLVM currently generates this code from the CBE:
void test(int l7_X) {
unsigned l8_in...