search for: stw

Displaying 20 results from an estimated 86 matches for "stw".

Did you mean: str
2006 Jun 26
0
[klibc 30/43] parisc support for klibc
...ode 100644 index 0000000..c8d766c --- /dev/null +++ b/usr/klibc/arch/parisc/setjmp.S @@ -0,0 +1,88 @@ +/* + * parisc specific setjmp/longjmp routines + * + */ + + .text + .align 4 + .global setjmp + .export setjmp, code + .proc + .callinfo +setjmp: + stw %r3,0(%r26) + stw %r4,8(%r26) + stw %r5,12(%r26) + stw %r6,16(%r26) + stw %r7,20(%r26) + stw %r8,24(%r26) + stw %r9,28(%r26) + stw %r10,32(%r26) + stw %r11,36(%r26) + stw %r12,40(%r26) + st...
2016 Jan 26
2
[v3,11/41] mips: reuse asm-generic/barrier.h
.... > > > > *) > > > > { > > > > 0:r1=x; 0:r2=y; 0:r3=z; > > > > 1:r1=x; 1:r2=y; 1:r3=z; 1:r4=1; > > > > 2:r1=x; 2:r2=y; 2:r3=z; 2:r4=1; 2:r5=2; > > > > } > > > > P0 | P1 | P2 ; > > > > lwz r6,0(r1) | stw r4,0(r2) | stw r5,0(r3) ; > > > > xor r7,r6,r6 | lwsync | lwsync ; > > > > lwzx r7,r7,r2 | stw r4,0(r3) | stw r4,0(r1) ; > > > > lwz r8,0(r3) | | ; > > > > > > > > exists > > > > (z=2 /\ 0:r6=1 /\ 0:r7=0 /\ 0:r8=1) > &...
2016 Jan 26
2
[v3,11/41] mips: reuse asm-generic/barrier.h
.... > > > > *) > > > > { > > > > 0:r1=x; 0:r2=y; 0:r3=z; > > > > 1:r1=x; 1:r2=y; 1:r3=z; 1:r4=1; > > > > 2:r1=x; 2:r2=y; 2:r3=z; 2:r4=1; 2:r5=2; > > > > } > > > > P0 | P1 | P2 ; > > > > lwz r6,0(r1) | stw r4,0(r2) | stw r5,0(r3) ; > > > > xor r7,r6,r6 | lwsync | lwsync ; > > > > lwzx r7,r7,r2 | stw r4,0(r3) | stw r4,0(r1) ; > > > > lwz r8,0(r3) | | ; > > > > > > > > exists > > > > (z=2 /\ 0:r6=1 /\ 0:r7=0 /\ 0:r8=1) > &...
2016 Jan 26
5
[v3,11/41] mips: reuse asm-generic/barrier.h
...gt; assert(!(z=2)) > > > > Forbidden by ppcmem, allowed by herd. > > *) > > { > > 0:r1=x; 0:r2=y; 0:r3=z; > > 1:r1=x; 1:r2=y; 1:r3=z; 1:r4=1; > > 2:r1=x; 2:r2=y; 2:r3=z; 2:r4=1; 2:r5=2; > > } > > P0 | P1 | P2 ; > > lwz r6,0(r1) | stw r4,0(r2) | stw r5,0(r3) ; > > xor r7,r6,r6 | lwsync | lwsync ; > > lwzx r7,r7,r2 | stw r4,0(r3) | stw r4,0(r1) ; > > lwz r8,0(r3) | | ; > > > > exists > > (z=2 /\ 0:r6=1 /\ 0:r7=0 /\ 0:r8=1) > > That really hurts. Assuming that the "assert(!(z=2...
2016 Jan 26
5
[v3,11/41] mips: reuse asm-generic/barrier.h
...gt; assert(!(z=2)) > > > > Forbidden by ppcmem, allowed by herd. > > *) > > { > > 0:r1=x; 0:r2=y; 0:r3=z; > > 1:r1=x; 1:r2=y; 1:r3=z; 1:r4=1; > > 2:r1=x; 2:r2=y; 2:r3=z; 2:r4=1; 2:r5=2; > > } > > P0 | P1 | P2 ; > > lwz r6,0(r1) | stw r4,0(r2) | stw r5,0(r3) ; > > xor r7,r6,r6 | lwsync | lwsync ; > > lwzx r7,r7,r2 | stw r4,0(r3) | stw r4,0(r1) ; > > lwz r8,0(r3) | | ; > > > > exists > > (z=2 /\ 0:r6=1 /\ 0:r7=0 /\ 0:r8=1) > > That really hurts. Assuming that the "assert(!(z=2...
2006 Oct 05
2
Issues after Samba updating a Samba PDC to 3.0.23c
...tempting to register passdb backend tdbsam Successfully added passdb backend 'tdbsam' Attempting to find an passdb backend to match ldapsam:ldap://localhost:389 (ldapsam) Found pdb backend ldapsam smbldap_search_domain_info: Searching for:[(&(objectClass=sambaDomain)(sambaDomainName=STW-GMH))] smbldap_open_connection: connection opened ldap_connect_system: succesful connection to the LDAP server pdb backend ldapsam:ldap://localhost:389 has a valid init Attempting to find an passdb backend to match ldapsam:ldap://localhost:389 (ldapsam) Found pdb backend ldapsam smbldap_search_do...
2016 Jan 26
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...ches WRC+addrs), > but your litmus test: > > > PPC WRCnf+addrs > > "" > > { > > 0:r2=x; 0:r3=y; > > 1:r2=x; 1:r3=y; > > 2:r2=x; 2:r3=y; > > c=a; d=b; x=c; y=d; > > } > > P0 | P1 | P2 ; > > stw r3,0(r2) | lwz r8,0(r2) | lwz r8,0(r3) ; > > | stw r2,0(r3) | lwz r9,0(r8) ; > > exists > > (1:r8=y /\ 2:r8=x /\ 2:r9=c) > > Seems to be missing the address dependency on P1. You are quite correct! How about the following? As before, both herd and ppcme...
2016 Jan 26
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...ches WRC+addrs), > but your litmus test: > > > PPC WRCnf+addrs > > "" > > { > > 0:r2=x; 0:r3=y; > > 1:r2=x; 1:r3=y; > > 2:r2=x; 2:r3=y; > > c=a; d=b; x=c; y=d; > > } > > P0 | P1 | P2 ; > > stw r3,0(r2) | lwz r8,0(r2) | lwz r8,0(r3) ; > > | stw r2,0(r3) | lwz r9,0(r8) ; > > exists > > (1:r8=y /\ 2:r8=x /\ 2:r9=c) > > Seems to be missing the address dependency on P1. You are quite correct! How about the following? As before, both herd and ppcme...
2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...d one set must contain the other. P0 P1 P2 Rx=1 Wy=1 Wz=2 dep. lwsync lwsync Ry=0 Wz=1 Wx=1 Rz=1 assert(!(z=2)) Forbidden by ppcmem, allowed by herd. *) { 0:r1=x; 0:r2=y; 0:r3=z; 1:r1=x; 1:r2=y; 1:r3=z; 1:r4=1; 2:r1=x; 2:r2=y; 2:r3=z; 2:r4=1; 2:r5=2; } P0 | P1 | P2 ; lwz r6,0(r1) | stw r4,0(r2) | stw r5,0(r3) ; xor r7,r6,r6 | lwsync | lwsync ; lwzx r7,r7,r2 | stw r4,0(r3) | stw r4,0(r1) ; lwz r8,0(r3) | | ; exists (z=2 /\ 0:r6=1 /\ 0:r7=0 /\ 0:r8=1)
2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...d one set must contain the other. P0 P1 P2 Rx=1 Wy=1 Wz=2 dep. lwsync lwsync Ry=0 Wz=1 Wx=1 Rz=1 assert(!(z=2)) Forbidden by ppcmem, allowed by herd. *) { 0:r1=x; 0:r2=y; 0:r3=z; 1:r1=x; 1:r2=y; 1:r3=z; 1:r4=1; 2:r1=x; 2:r2=y; 2:r3=z; 2:r4=1; 2:r5=2; } P0 | P1 | P2 ; lwz r6,0(r1) | stw r4,0(r2) | stw r5,0(r3) ; xor r7,r6,r6 | lwsync | lwsync ; lwzx r7,r7,r2 | stw r4,0(r3) | stw r4,0(r1) ; lwz r8,0(r3) | | ; exists (z=2 /\ 0:r6=1 /\ 0:r7=0 /\ 0:r8=1)
2013 Nov 19
2
[LLVMdev] [3.4 branch] PPC64 regressions
...he time counter from the build system): [ 3468s] /home/abuild/rpmbuild/BUILD/llvm/test/CodeGen/PowerPC/ppc32-vacopy.ll:21:10: error: expected string not found in input [ 3468s] ; CHECK: lwz [[REG3:[0-9]+]], {{.*}} [ 3468s] ^ [ 3468s] <stdin>:15:2: note: scanning from here [ 3468s] stw 5, 16(1) [ 3468s] ^ [ 3468s] <stdin>:17:3: note: possible intended match here [ 3468s] stw 4, 4(7) [ 3468s] ^ [ 3467s] /home/abuild/rpmbuild/BUILD/llvm/test/CodeGen/PowerPC/anon_aggr.ll:75:13: error: expected string not found in input [ 3467s] ; DARWIN32: lwz r[[REG2:[0-9]+]], 44(r[[REGS...
2009 Jun 30
2
[LLVMdev] modifying llc asm output
Hi I am trying to modify the llc in that way: subf 3, 5, 3 subf 3, 5, 3 stw 3, 44(1) stw 3, 44(1) # InlineAsm Start --> isync # InlineAsm End lwz 3...
2016 Jan 26
1
[v3,11/41] mips: reuse asm-generic/barrier.h
...> "" > > > > { > > > > 0:r2=x; 0:r3=y; > > > > 1:r2=x; 1:r3=y; > > > > 2:r2=x; 2:r3=y; > > > > c=a; d=b; x=c; y=d; > > > > } > > > > P0 | P1 | P2 ; > > > > stw r3,0(r2) | lwz r8,0(r2) | lwz r8,0(r3) ; > > > > | stw r2,0(r3) | lwz r9,0(r8) ; > > > > exists > > > > (1:r8=y /\ 2:r8=x /\ 2:r9=c) > > > > > > Seems to be missing the address dependency on P1. > > > > You are qu...
2016 Jan 26
1
[v3,11/41] mips: reuse asm-generic/barrier.h
...> "" > > > > { > > > > 0:r2=x; 0:r3=y; > > > > 1:r2=x; 1:r3=y; > > > > 2:r2=x; 2:r3=y; > > > > c=a; d=b; x=c; y=d; > > > > } > > > > P0 | P1 | P2 ; > > > > stw r3,0(r2) | lwz r8,0(r2) | lwz r8,0(r3) ; > > > > | stw r2,0(r3) | lwz r9,0(r8) ; > > > > exists > > > > (1:r8=y /\ 2:r8=x /\ 2:r9=c) > > > > > > Seems to be missing the address dependency on P1. > > > > You are qu...
2008 Jul 23
2
[LLVMdev] customized output of double load/store on ppc32
Hi For .LL like: define void @Func() { %var1 = alloca double store double 0x40bb580000000000, double* %var1 ret void } ppc32 output is: ... lis 3, 16571 ori 3, 3, 22528 li 4, 0 stw 3, 8(1) stw 4, 12(1) ... I'm using the PPC backend's output as the "bytecode" for an interpreter that I would like to be able to run on both little- and big-endian platforms. The split stw's mean that i32s of the f64 are swapped in memory on little-endian (thus foilin...
2013 Nov 19
0
[LLVMdev] [3.4 branch] PPC64 regressions
...gt; > > > [ 3468s] > /home/abuild/rpmbuild/BUILD/llvm/test/CodeGen/PowerPC/ppc32-vacopy.ll:21:10: > error: expected string not found in input > [ 3468s] ; CHECK: lwz [[REG3:[0-9]+]], {{.*}} > [ 3468s] ^ > [ 3468s] <stdin>:15:2: note: scanning from here > [ 3468s] stw 5, 16(1) > [ 3468s] ^ > [ 3468s] <stdin>:17:3: note: possible intended match here > [ 3468s] stw 4, 4(7) > [ 3468s] ^ > > > > [ 3467s] > /home/abuild/rpmbuild/BUILD/llvm/test/CodeGen/PowerPC/anon_aggr.ll:75:13: > error: expected string not found in input >...
2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...e understand the benefits of fake dependencies. Why do you ask? ;-) ------------------------------------------------------------------------ PPC WRCnf+addrs "" { 0:r2=x; 0:r3=y; 1:r2=x; 1:r3=y; 2:r2=x; 2:r3=y; c=a; d=b; x=c; y=d; } P0 | P1 | P2 ; stw r3,0(r2) | lwz r8,0(r2) | lwz r8,0(r3) ; | stw r2,0(r3) | lwz r9,0(r8) ; exists (1:r8=y /\ 2:r8=x /\ 2:r9=c)
2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...e understand the benefits of fake dependencies. Why do you ask? ;-) ------------------------------------------------------------------------ PPC WRCnf+addrs "" { 0:r2=x; 0:r3=y; 1:r2=x; 1:r3=y; 2:r2=x; 2:r3=y; c=a; d=b; x=c; y=d; } P0 | P1 | P2 ; stw r3,0(r2) | lwz r8,0(r2) | lwz r8,0(r3) ; | stw r2,0(r3) | lwz r9,0(r8) ; exists (1:r8=y /\ 2:r8=x /\ 2:r9=c)
2012 May 02
4
[LLVMdev] [cfe-dev] Odd PPC inline asm constraint
...le to call into libc.so just fine), as well as an old C version of the SPEC97 tomcatv benchmark I have laying around. So it seems both 32-bit and 64-bit can call into shared libs. Not to say I haven't seen some code gen warts (using -O3). :) >From hello.s: main: mflr 0 stw 31, -4(1) stw 0, 4(1) stwu 1, -16(1) lis 3, .Lstr at ha mr 31, 1 la 3, .Lstr at l(3) bl puts li 3, 0 addi 1, 1, 16 lwz 0, 4(1) lwz 31, -4(1) mtlr 0 blr By the strict letter of the 32-bit ABI, the save...
2019 Jan 15
4
Aggressive optimization opportunity
...ith option -qrestrict at -O2, we get result: 0000000000000000 <foo>: 0: 00 00 4c 3c addis r2,r12,0 4: 00 00 42 38 addi r2,r2,0 8: 00 00 a2 3c addis r5,r2,0 c: 00 00 a5 e8 ld r5,0(r5) 10: 0b 00 00 38 li r0,11 14: 00 00 03 90 stw r0,0(r3) 18: 00 00 85 80 lwz r4,0(r5) 1c: 0b 00 60 38 li r3,11 ------>since we confirm num will not change the content where pointer to, compiler can directly return 11. 20: 01 00 04 38 addi r0,r4,1 24: 00 00 05 90 stw r0,0(r5) 28: 20...