Displaying 20 results from an estimated 33 matches for "stts".
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2012 Jun 29
0
[PATCH] linux-2.6.18/x86: improve CR0 read/write handling
...) = x__; \
+} while (0)
#define read_cr2() (current_vcpu_info()->arch.cr2)
#define write_cr2(x) \
@@ -142,8 +158,19 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t"
/*
* Clear and set ''TS'' bit respectively
*/
-#define clts() (HYPERVISOR_fpu_taskswitch(0))
-#define stts() (HYPERVISOR_fpu_taskswitch(1))
+#define X86_CR0_TS 8
+#define clts() ({ \
+ if (__get_cpu_var(xen_x86_cr0) & X86_CR0_TS) { \
+ HYPERVISOR_fpu_taskswitch(0); \
+ __get_cpu_var(xen_x86_cr0) &= ~X86_CR0_TS; \
+ } \
+})
+#define stts() ({ \
+ if (!(__get_cpu_var(xen_x86_cr0) & X86_CR0_T...
Xen PV ABI on FPU doesn't match with pvops kernel FPU code, reducing to a serious memory data damage
2013 Nov 07
0
Xen PV ABI on FPU doesn't match with pvops kernel FPU code, reducing to a serious memory data damage
...ane.comp.emulators.xen.devel/176970 for
more discussions and test cases.
Ian and George, we have confirmed this is the very root cause of
http://comments.gmane.org/gmane.comp.emulators.xen.devel/175491
The xen ABI is part of history which can't be changed, as well as
simply adding a couple of stts()-clts() around the enabling/disabling
interrupts is a really ugly hack.
Maintainers, any thoughts?
--
Thanks,
Zhu Yanhai
Xen PV ABI on FPU doesn't match with pvops kernel FPU code, reducing to a serious memory data damage
2013 Nov 07
0
Xen PV ABI on FPU doesn't match with pvops kernel FPU code, reducing to a serious memory data damage
...ane.comp.emulators.xen.devel/176970 for
more discussions and test cases.
Ian and George, we have confirmed this is the very root cause of
http://comments.gmane.org/gmane.comp.emulators.xen.devel/175491
The xen ABI is part of history which can't be changed, as well as
simply adding a couple of stts()-clts() around the enabling/disabling
interrupts is a really ugly hack.
Maintainers, any thoughts?
--
Thanks,
Zhu Yanhai
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 03/17] paravirt_ops - system routines
...0 native_write_cr0
+#define read_cr2 native_read_cr2
+#define write_cr2 native_write_cr2
+#define read_cr3 native_read_cr3
+#define write_cr3 native_write_cr3
+#define read_cr4 native_read_cr4
+#define write_cr4 native_write_cr4
+#define wbinvd native_wbinvd
+#endif /* CONFIG_PARAVIRT */
#define stts() write_cr0(8 | read_cr0())
-#define wbinvd() \
- __asm__ __volatile__ ("wbinvd": : :"memory");
/*
* On SMP systems, when the scheduler does migration-cost autodetection,
--
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 03/17] paravirt_ops - system routines
...0 native_write_cr0
+#define read_cr2 native_read_cr2
+#define write_cr2 native_write_cr2
+#define read_cr3 native_read_cr3
+#define write_cr3 native_write_cr3
+#define read_cr4 native_read_cr4
+#define write_cr4 native_write_cr4
+#define wbinvd native_wbinvd
+#endif /* CONFIG_PARAVIRT */
#define stts() write_cr0(8 | read_cr0())
-#define wbinvd() \
- __asm__ __volatile__ ("wbinvd": : :"memory");
/*
* On SMP systems, when the scheduler does migration-cost autodetection,
--
2007 Apr 18
5
[PATCH] paravirt.h
...ile__( \
@@ -133,16 +136,17 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t"
#define write_cr4(x) \
__asm__ __volatile__("movl %0,%%cr4": :"r" (x))
-/*
- * Clear and set 'TS' bit respectively
- */
-#define clts() __asm__ __volatile__ ("clts")
-#define stts() write_cr0(8 | read_cr0())
-
-#endif /* __KERNEL__ */
-
#define wbinvd() \
__asm__ __volatile__ ("wbinvd": : :"memory")
+
+/* Clear the 'TS' bit */
+#define clts() __asm__ __volatile__ ("clts")
+#endif/* CONFIG_PARAVIRT */
+
+/* Set the 'TS' bit */...
2007 Apr 18
5
[PATCH] paravirt.h
...ile__( \
@@ -133,16 +136,17 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t"
#define write_cr4(x) \
__asm__ __volatile__("movl %0,%%cr4": :"r" (x))
-/*
- * Clear and set 'TS' bit respectively
- */
-#define clts() __asm__ __volatile__ ("clts")
-#define stts() write_cr0(8 | read_cr0())
-
-#endif /* __KERNEL__ */
-
#define wbinvd() \
__asm__ __volatile__ ("wbinvd": : :"memory")
+
+/* Clear the 'TS' bit */
+#define clts() __asm__ __volatile__ ("clts")
+#endif/* CONFIG_PARAVIRT */
+
+/* Set the 'TS' bit */...
2007 Apr 18
0
[RFC, PATCH 13/24] i386 Vmi system header
..._ex_table,\"a\" \n" \
- ".long 1b,2b \n" \
- ".previous \n" \
- : "=r" (__dummy): "0" (0)); \
- __dummy; \
-})
-
-#define write_cr4(x) \
- __asm__ __volatile__("movl %0,%%cr4": :"r" (x));
-#define stts() write_cr0(8 | read_cr0())
-
#endif /* __KERNEL__ */
-#define wbinvd() \
- __asm__ __volatile__ ("wbinvd": : :"memory");
-
static inline unsigned long get_limit(unsigned long segment)
{
unsigned long __limit;
@@ -518,16 +459,7 @@ struct alt_instr {
#define set_wmb(va...
2007 Apr 18
0
[RFC, PATCH 13/24] i386 Vmi system header
..._ex_table,\"a\" \n" \
- ".long 1b,2b \n" \
- ".previous \n" \
- : "=r" (__dummy): "0" (0)); \
- __dummy; \
-})
-
-#define write_cr4(x) \
- __asm__ __volatile__("movl %0,%%cr4": :"r" (x));
-#define stts() write_cr0(8 | read_cr0())
-
#endif /* __KERNEL__ */
-#define wbinvd() \
- __asm__ __volatile__ ("wbinvd": : :"memory");
-
static inline unsigned long get_limit(unsigned long segment)
{
unsigned long __limit;
@@ -518,16 +459,7 @@ struct alt_instr {
#define set_wmb(va...
2007 Apr 18
1
[RFC, PATCH 12/24] i386 Vmi processor header
...t;i" (~X86_EFLAGS_IOPL), "r" (mask));
-}
-
/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;
@@ -740,4 +643,8 @@ extern void mcheck_init(struct cpuinfo_x
#define mcheck_init(c) do {} while(0)
#endif
+#include <mach_processor.h>
+
+#define stts() write_cr0(8 | read_cr0())
+
#endif /* __ASM_I386_PROCESSOR_H */
Index: linux-2.6.16-rc5/include/asm-i386/mach-vmi/mach_processor.h
===================================================================
--- linux-2.6.16-rc5.orig/include/asm-i386/mach-vmi/mach_processor.h 2006-03-10 13:03:35.00000000...
2007 Apr 18
1
[RFC, PATCH 12/24] i386 Vmi processor header
...t;i" (~X86_EFLAGS_IOPL), "r" (mask));
-}
-
/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;
@@ -740,4 +643,8 @@ extern void mcheck_init(struct cpuinfo_x
#define mcheck_init(c) do {} while(0)
#endif
+#include <mach_processor.h>
+
+#define stts() write_cr0(8 | read_cr0())
+
#endif /* __ASM_I386_PROCESSOR_H */
Index: linux-2.6.16-rc5/include/asm-i386/mach-vmi/mach_processor.h
===================================================================
--- linux-2.6.16-rc5.orig/include/asm-i386/mach-vmi/mach_processor.h 2006-03-10 13:03:35.00000000...
2007 Jun 27
0
[PATCH 1/10] Provide basic Xen PM infrastructure
...mp;v->arch.guest_context, 2);
+ loaddebug(&v->arch.guest_context, 3);
+ /* no 4 and 5 */
+ loaddebug(&v->arch.guest_context, 6);
+ loaddebug(&v->arch.guest_context, 7);
+ }
+
+ /* Do we start fpu really? Just set cr0.ts to monitor it */
+ stts();
+
+ mtrr_ap_init();
+ mcheck_init(&boot_cpu_data);
+}
diff -r 9261686d840c xen/arch/x86/acpi/wakeup_prot.S
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/xen/arch/x86/acpi/wakeup_prot.S Tue Jun 26 20:28:13 2007 -0400
@@ -0,0 +1,267 @@
+ .text
+
+#include <xen/config.h>...
2007 Feb 14
4
[PATCH 3/12] Provide basic Xen PM infrastructure
..."=rm" (value))
+
+#define set_debugreg(value, register) \
+ __asm__("movl %0,%%db" #register \
+ : /* no output */ \
+ :"r" (value))
+
+void kernel_fpu_begin(void)
+{
+ clts();
+}
+
+void kernel_fpu_end(void)
+{
+ stts();
+}
+#endif
static struct saved_context saved_context;
@@ -34,8 +115,10 @@ void __save_processor_state(struct saved
* segment registers
*/
savesegment(es, ctxt->es);
+#ifndef __XEN__
savesegment(fs, ctxt->fs);
savesegment(gs, ctxt->gs);
+#endif
savesegment(ss, ctxt...
2007 Apr 18
3
[PATCH 1/4] x86 paravirt_ops: create no_paravirt.h for native ops
..."0" (0)); \
- __dummy; \
-})
-#define write_cr4(x) \
- __asm__ __volatile__("movl %0,%%cr4": :"r" (x))
-
-/*
- * Clear and set 'TS' bit respectively
- */
-#define clts() __asm__ __volatile__ ("clts")
+/* Set 'TS' bit */
#define stts() write_cr0(8 | read_cr0())
#endif /* __KERNEL__ */
-
-#define wbinvd() \
- __asm__ __volatile__ ("wbinvd": : :"memory")
static inline unsigned long get_limit(unsigned long segment)
{
===================================================================
--- /dev/null
+++ b/...
2007 Apr 18
3
[PATCH 1/4] x86 paravirt_ops: create no_paravirt.h for native ops
..."0" (0)); \
- __dummy; \
-})
-#define write_cr4(x) \
- __asm__ __volatile__("movl %0,%%cr4": :"r" (x))
-
-/*
- * Clear and set 'TS' bit respectively
- */
-#define clts() __asm__ __volatile__ ("clts")
+/* Set 'TS' bit */
#define stts() write_cr0(8 | read_cr0())
#endif /* __KERNEL__ */
-
-#define wbinvd() \
- __asm__ __volatile__ ("wbinvd": : :"memory")
static inline unsigned long get_limit(unsigned long segment)
{
===================================================================
--- /dev/null
+++ b/...
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
...RAVIRT
+#include <asm/paravirt.h>
+#else
/*
* Clear and set 'TS' bit respectively
*/
@@ -99,12 +102,14 @@ static inline unsigned long read_cr4(voi
static inline void write_cr4(unsigned long val)
{
asm volatile("movq %0,%%cr4" :: "r" (val));
-}
-
-#define stts() write_cr0(8 | read_cr0())
+}
#define wbinvd() \
__asm__ __volatile__ ("wbinvd": : :"memory");
+#endif /* CONFIG_PARAVIRT */
+
+#define stts() write_cr0(8 | read_cr0())
+
/*
* On SMP systems, when the scheduler does migration-cost autodetection,
Index: linux-2.6.19-qu...
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
...RAVIRT
+#include <asm/paravirt.h>
+#else
/*
* Clear and set 'TS' bit respectively
*/
@@ -99,12 +102,14 @@ static inline unsigned long read_cr4(voi
static inline void write_cr4(unsigned long val)
{
asm volatile("movq %0,%%cr4" :: "r" (val));
-}
-
-#define stts() write_cr0(8 | read_cr0())
+}
#define wbinvd() \
__asm__ __volatile__ ("wbinvd": : :"memory");
+#endif /* CONFIG_PARAVIRT */
+
+#define stts() write_cr0(8 | read_cr0())
+
/*
* On SMP systems, when the scheduler does migration-cost autodetection,
Index: linux-2.6.19-qu...
2007 Apr 18
3
[PATCH 1/2] paravirt.h header
OK, this is the revised paravirt.h (Andi has seen this before), then the
second is the binary patching stuff. More things get added to the
paravirt struct in future patches, but this basic stuff hasn't changed
for some time.
====
This patch does the dumbest possible replacement of paravirtualized
instructions: calls through a "paravirt_ops" structure. Currently
these are function
2009 Nov 18
5
[PATCH 0/3] Split up pv-ops
Paravirt ops is currently only capable of either replacing a lot of Linux
internal code or none at all. The are users that don't need all of the
possibilities pv-ops delivers though.
On KVM for example we're perfectly fine not using the PV MMU, thus not
touching any MMU code. That way we don't have to improve pv-ops to become
fast, we just don't compile the MMU parts in!
This
2009 Nov 18
5
[PATCH 0/3] Split up pv-ops
Paravirt ops is currently only capable of either replacing a lot of Linux
internal code or none at all. The are users that don't need all of the
possibilities pv-ops delivers though.
On KVM for example we're perfectly fine not using the PV MMU, thus not
touching any MMU code. That way we don't have to improve pv-ops to become
fast, we just don't compile the MMU parts in!
This