search for: str_off

Displaying 13 results from an estimated 13 matches for "str_off".

2018 Jun 05
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...he step is always 1. Anyway, I don't mind any name, really. Whatever is more mnemonic. > ;; Create sequence for scalable vector > %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() > %mulbystride = mul <scalable 4 x i32> %stepvector, %str_off > %addoffset = add <scalable 4 x i32> %mulbystride, %str_off Once stepvetor (or iota) becomes a proper IR instruction, I'd like to see this restricted to inlined syntax. The sequence { step*vec + offset } only makes sense in the scalable context and the intermediate results should no...
2018 Jun 05
14
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...able 4 x i32> undef, i32 %value, i32 0 %splat = shufflevector <scalable 4 x i32> %insert, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer ;; Splat offset + stride (the same in this case) %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer ;; Create sequence for scalable vector %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() %mulbystride = mul <scalable 4 x i32...
2019 May 24
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...ef, i32 %value, i32 0 > %splat = shufflevector <scalable 4 x i32> %insert, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Splat offset + stride (the same in this case) > %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 > %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Create sequence for scalable vector > %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() > %mulbystride = mul <s...
2018 Jul 30
5
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...undef, i32 %value, i32 0 > %splat = shufflevector <scalable 4 x i32> %insert, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Splat offset + stride (the same in this case) > %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 > %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Create sequence for scalable vector > %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() > %mulbystride = mul <scal...
2019 May 24
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...able 4 x i32> undef, i32 %value, i32 0 %splat = shufflevector <scalable 4 x i32> %insert, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer ;; Splat offset + stride (the same in this case) %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer ;; Create sequence for scalable vector %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() %mulbystride = mul <scalable 4 x i32...
2019 May 27
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...able 4 x i32> undef, i32 %value, i32 0 %splat = shufflevector <scalable 4 x i32> %insert, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer ;; Splat offset + stride (the same in this case) %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer ;; Create sequence for scalable vector %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() %mulbystride = mul <scalable 4 x i32...
2019 Jun 03
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...ef, i32 %value, i32 0 > %splat = shufflevector <scalable 4 x i32> %insert, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Splat offset + stride (the same in this case) > %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 > %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Create sequence for scalable vector > %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() > %mulbystride = mul <s...
2018 Jul 30
7
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...at = shufflevector <scalable 4 x i32> %insert, <scalable 4 > x i32> undef, <scalable 4 x i32> zeroinitializer > >  ;; Splat offset + stride (the same in this case) > >  %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 > >  %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable > 4 x i32> undef, <scalable 4 x i32> zeroinitializer > >  ;; Create sequence for scalable vector > >  %stepvector = call <scalable 4 x i32> > @llvm.experimental.vector.stepvector.nxv4i32...
2018 Jul 02
3
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...i32 %value, i32 0 > %splat = shufflevector <scalable 4 x i32> %insert, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Splat offset + stride (the same in this case) > %insert2 = insertelement <scalable 4 x i32> under, i32 2, i32 0 > %str_off = shufflevector <scalable 4 x i32> %insert2, <scalable 4 x i32> undef, <scalable 4 x i32> zeroinitializer > ;; Create sequence for scalable vector > %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() > %mulbystride = mul &l...
2017 May 03
3
DWARF Fission + ThinLTO
...iple DWO files stacked together - mostly to deduplicate strings and type units as a sort of archival (like dsym) format. The way DWPs work, roughly (full/more details here: https://gcc.gnu.org/wiki/DebugFissionDWP ) is that all the sections are concatenated together, except the debug_str and debug_str_offsets sections which have special handling to do what you'd expect - deduplicate strings, and adjust the str_offsets to point to the right offsets in the deduplicated string section. The other thing that DWP has, is an index, or two. cu_index and tu_index. We'll just look at cu_index. A cu_...
2017 May 04
2
DWARF Fission + ThinLTO
...type units as a sort of archival (like dsym) format. >> >> The way DWPs work, roughly (full/more details here: https://gcc.gnu.org/wiki/DebugFissionDWP <https://gcc.gnu.org/wiki/DebugFissionDWP> ) is that all the sections are concatenated together, except the debug_str and debug_str_offsets sections which have special handling to do what you'd expect - deduplicate strings, and adjust the str_offsets to point to the right offsets in the deduplicated string section. >> >> The other thing that DWP has, is an index, or two. cu_index and tu_index. We'll just look a...
2017 May 04
3
DWARF Fission + ThinLTO
...iple DWO files stacked together - mostly to deduplicate strings and type units as a sort of archival (like dsym) format. The way DWPs work, roughly (full/more details here: https://gcc.gnu.org/wiki/DebugFissionDWP ) is that all the sections are concatenated together, except the debug_str and debug_str_offsets sections which have special handling to do what you'd expect - deduplicate strings, and adjust the str_offsets to point to the right offsets in the deduplicated string section. The other thing that DWP has, is an index, or two. cu_index and tu_index. We'll just look at cu_index. A cu_...
2017 May 03
4
DWARF Fission + ThinLTO
So Dehao and I have been dealing with some of the nitty gritty details of debug info with ThinLTO, specifically with Fission(Split DWARF). This applies to LTO as well, so I won't single out ThinLTO here. 1) Multiple CUs in a .dwo file Clang/LLVM produces a CU for each original source file - these CUs are kept through IR linking (thin or full) and produced as distinct CUs in the resulting