search for: storesdnodes

Mon Ping, Thanks for the tip, but I can't for the life of me seem to get the Value from a StoreSDNode. From looking at the SelectionDAGNodes header file, the only class that has the getValue function call is SrcValueSDNode that returns a Value type. The only class that has getType is a ConstantPoolSDNode. I don't think that ConstantPoolSDNode is what I want and when I try to cast the

...o intrinsics, etc. Forcing custom lowering for ISD::LOAD/STORE means that you lose lots of the information carried along with the Load/StoreSDNode that makes writing instruction patterns (particularly the ext/trunc predicates) simple. Another possibility is to add a utility function to Load/StoreSDNodes that returns the address space of the pointer being used. For my use I think this way is probably best, though there's nothing preventing a target from doing custom lowering. -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http:/...

I'm digging into this, but I'd like to know if it's feasible to get to the pointer type from a Load/Store SDNode? This would relieve me from having to put the address space information into those SDNodes. Is Load/StoreSDNode->getSrcValue()->getType() going to do what I want? If not, I can't see another way of getting to the pointer type. -- Christopher Lamb

Hi All, I'd like to add HLE support in LLVM/clang consistent to GCC's style [1]. HLE from Intel TSX [2] is legacy compatible instruction set extension to specify transactional region by adding XACQUIRE and XRELEASE prefixes. To support that, GCC chooses the approach by extending the memory order flag in __atomic_* builtins with target-specific memory model in high bits (bit 31-16 for

On Wed, 21 Nov 2007, Christopher Lamb wrote: > I'm digging into this, but I'd like to know if it's feasible to get to the > pointer type from a Load/Store SDNode? This would relieve me from having to > put the address space information into those SDNodes. > > Is Load/StoreSDNode->getSrcValue()->getType() going to do what I want? > If not, I can't see

Firstoff, let me say what a mind fsck the Cell SPU can be. It's really not that hard an architecture to get one's mind around, but I can see how it becomes a compiler writer's nightmare. And I'm attempting to write a SPU backend. And it's going slowly. Here's my problem: The SPU's registers are all 128-bit vector registers. That's their native mode. They can be

On 3/11/07, Reid Spencer <rspencer at reidspencer.com> wrote: > Could you submit the patch? We could make sure that 2.0 doesn't have the > same problem. Sure, I can't test this from where I am now but if anyone can take it for a spin to test it and verify the fix then by all means check it in. I'm just providing a hand-edited diff from our vendor branch here (1.9 tarball

The address qualifier is stored in the type of %result. From that operand, you can get the Value and then call getType. The type for result should be a PointerType which you cast to a PointerType and get the getAddressSpace e.g. cast<PointerType>(Ty)->getAddressSpace() -- Mon Ping On Sep 17, 2008, at 1:06 PM, Villmow, Micah wrote: > How do I access the address qualifier

On Feb 10, 2010, at 10:20 AM, David Greene wrote: > On Wednesday 10 February 2010 11:46:25 Chris Lattner wrote: > >>> There is not any mechanism to attach metadata with SDNode or >>> MachineInstrs today. >> >> For nontemporal stores, you wouldn't want to do this anyway. In >> selectiondag builder, you'd want to check the store instruction to

No, the problem with StoreSDNode was that an argument as being called Value, which hid the class Value later on in the argument list. This also broke 2003 and was fixed a while ago. _WIN32_WINNT is not supposed to be predefined, so that warning shouldn't be occurring. I have never seen it myself, and a predefined value could be inappropriate. Most of the other changes seem to be about

On Feb 10, 2010, at 12:42 PM, David Greene wrote: > On Wednesday 10 February 2010 12:58:25 Chris Lattner wrote: > >> I think that adding a bit to LoadSDNode and StoreSDNode would make sense. > > Ok. The consequence is that a number of functions will have to change to > propagate this bit, analogous to what happens with isVolatile. It's > essentially what we do

How do I access the address qualifier from the store instruction. Given the following code: define void @test_unary_op_anegate(float %x, float addrspace(11)* %result) nounwind { entry: %neg = sub float -0.000000e+000, %x ; <float> [#uses=1] store float %neg, float addrspace(11)* %result ret void } When I attempt to generate this code, I'm

Here is the patch 0004-Enable-HLE-code-generation.patch Yours - Michael On Tue, 2013-02-19 at 14:07 -0800, Michael Liao wrote: > Hi All, > > I'd like to add HLE support in LLVM/clang consistent to GCC's style [1]. > HLE from Intel TSX [2] is legacy compatible instruction set extension to > specify transactional region by adding XACQUIRE and XRELEASE prefixes. > To

Here is the patch 0002-Add-HLE-target-feature.patch Yours - Michael On Tue, 2013-02-19 at 14:07 -0800, Michael Liao wrote: > Hi All, > > I'd like to add HLE support in LLVM/clang consistent to GCC's style [1]. > HLE from Intel TSX [2] is legacy compatible instruction set extension to > specify transactional region by adding XACQUIRE and XRELEASE prefixes. > To support

Here is the patch 0003-Add-XACQ-XREL-prefix-and-encoding-asm-printer-suppor.patch Yours - Michael On Tue, 2013-02-19 at 14:07 -0800, Michael Liao wrote: > Hi All, > > I'd like to add HLE support in LLVM/clang consistent to GCC's style [1]. > HLE from Intel TSX [2] is legacy compatible instruction set extension to > specify transactional region by adding XACQUIRE and

Hi All, I'd like to add HLE support in LLVM/clang consistent to GCC's style [1]. HLE from Intel TSX [2] is legacy compatible instruction set extension to specify transactional region by adding XACQUIRE and XRELEASE prefixes. To support that, GCC chooses the approach by extending the memory order flag in __atomic_* builtins with target-specific memory model in high bits (bit 31-16 for

Hi Michael, Why do you want to add transactional memory support to LLVM ? Can't you implement transactional memory using a library call ? Judging by the number of patches it looks like a major change to LLVM, and I am not sure that I understand the motivation for including it in LLVM. Thanks, Nadav On Feb 19, 2013, at 11:52 AM, Michael Liao <michael.liao at intel.com> wrote:

Hi all, A few things. Firstly, I've got a working implementation of the X86ThisCall calling convention, but I'm unsure how to go about submitting it. (I'm not really sure how to go about creating patch files etc, but would like to contribute to the project). Also, I'm using MS Visual C++ Express, and there are a few things that stop llvm1.9 (and the current CVS release) from

On Wednesday 10 February 2010 12:58:25 Chris Lattner wrote: > I think that adding a bit to LoadSDNode and StoreSDNode would make sense. Ok. The consequence is that a number of functions will have to change to propagate this bit, analogous to what happens with isVolatile. It's essentially what we do right now here. If everyone's ok with that, I'll go that route.

On Wednesday 10 February 2010 14:58:58 Dan Gohman wrote: > On Feb 10, 2010, at 12:42 PM, David Greene wrote: > > On Wednesday 10 February 2010 12:58:25 Chris Lattner wrote: > >> I think that adding a bit to LoadSDNode and StoreSDNode would make > >> sense. > > > > Ok. The consequence is that a number of functions will have to change to > > propagate