search for: sth8

Displaying 6 results from an estimated 6 matches for "sth8".

Did you mean: st8
[LLVMdev] Scheduling question (memory dependency)
2012 Sep 20
2
[LLVMdev] Scheduling question (memory dependency)
...s: Post SSA Frame Objects: fi#-1: size=2, align=2, fixed, at location [SP+50] Function Live Ins: %X3 in %vreg1, %X4 in %vreg2 0B BB#0: derived from LLVM BB %entry Live Ins: %X3 %X4 16B %vreg2<def> = COPY %X4; G8RC_with_sub_32:%vreg2 32B %vreg1<def> = COPY %X3; G8RC:%vreg1 48B STH8 %vreg1<kill>, 0, <fi#-1>; mem:ST2[FixedStack-1] G8RC:%vreg1 64B %vreg4<def> = LHA 0, <fi#-1>; mem:LD2[%0] GPRC:%vreg4 ... --------------------------------------------------------------- So far, so good. When we get to list scheduling, not quite so good: -...
[LLVMdev] Scheduling question (memory dependency)
2012 Sep 21
0
[LLVMdev] Scheduling question (memory dependency)
...!0" decoration on the load. I don't know whether this helps or not. Later the lowered instructions look like: ------------------------------------------------------------------ 16B %vreg2<def> = COPY %X4; G8RC_with_sub_32:%vreg2 32B %vreg1<def> = COPY %X3; G8RC:%vreg1 48B STH8 %vreg1<kill>, 0, <fi#-1>; mem:ST2[FixedStack-1] G8RC:%vreg1 64B %vreg0<def> = LHZ 0, <fi#-1>; mem:LD2[%i11] GPRC:%vreg0 ... ------------------------------------------------------------------ Note the %i11 instead of %0 on the LHZ as another difference. The...
[LLVMdev] Scheduling question (memory dependency)
2012 Sep 21
2
[LLVMdev] Scheduling question (memory dependency)
...> don't know whether this helps or not. Later the lowered instructions > look like: > > ------------------------------------------------------------------ > 16B %vreg2<def> = COPY %X4; G8RC_with_sub_32:%vreg2 > 32B %vreg1<def> = COPY %X3; G8RC:%vreg1 > 48B STH8 %vreg1<kill>, 0, <fi#-1>; mem:ST2[FixedStack-1] > G8RC:%vreg1 > 64B %vreg0<def> = LHZ 0, <fi#-1>; mem:LD2[%i11] GPRC:%vreg0 > ... > ------------------------------------------------------------------ > > Note the %i11 instead of %0 on the L...
[LLVMdev] Scheduling question (memory dependency)
2012 Sep 21
2
[LLVMdev] Scheduling question (memory dependency)
...owered instructions > > > look like: > > > > > > ------------------------------------------------------------------ > > > 16B %vreg2<def> = COPY %X4; G8RC_with_sub_32:%vreg2 > > > 32B %vreg1<def> = COPY %X3; G8RC:%vreg1 > > > 48B STH8 %vreg1<kill>, 0, <fi#-1>; mem:ST2[FixedStack-1] > > > G8RC:%vreg1 > > > 64B %vreg0<def> = LHZ 0, <fi#-1>; mem:LD2[%i11] GPRC:%vreg0 > > > ... > > > ------------------------------------------------------------------ > &g...
[LLVMdev] Scheduling question (memory dependency)
2012 Sep 21
0
[LLVMdev] Scheduling question (memory dependency)
...his helps or not. Later the lowered instructions > > look like: > > > > ------------------------------------------------------------------ > > 16B %vreg2<def> = COPY %X4; G8RC_with_sub_32:%vreg2 > > 32B %vreg1<def> = COPY %X3; G8RC:%vreg1 > > 48B STH8 %vreg1<kill>, 0, <fi#-1>; mem:ST2[FixedStack-1] > > G8RC:%vreg1 > > 64B %vreg0<def> = LHZ 0, <fi#-1>; mem:LD2[%i11] GPRC:%vreg0 > > ... > > ------------------------------------------------------------------ > > > > Note t...
[LLVMdev] Scheduling question (memory dependency)
2012 Sep 21
0
[LLVMdev] Scheduling question (memory dependency)
...> > look like: > > > > > > > > ------------------------------------------------------------------ > > > > 16B %vreg2<def> = COPY %X4; G8RC_with_sub_32:%vreg2 > > > > 32B %vreg1<def> = COPY %X3; G8RC:%vreg1 > > > > 48B STH8 %vreg1<kill>, 0, <fi#-1>; mem:ST2[FixedStack-1] > > > > G8RC:%vreg1 > > > > 64B %vreg0<def> = LHZ 0, <fi#-1>; mem:LD2[%i11] GPRC:%vreg0 > > > > ... > > > > ------------------------------------------------------...