search for: stepvetor

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2018 Jun 05
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...monic. > ;; Create sequence for scalable vector > %stepvector = call <scalable 4 x i32> @llvm.experimental.vector.stepvector.nxv4i32() > %mulbystride = mul <scalable 4 x i32> %stepvector, %str_off > %addoffset = add <scalable 4 x i32> %mulbystride, %str_off Once stepvetor (or iota) becomes a proper IR instruction, I'd like to see this restricted to inlined syntax. The sequence { step*vec + offset } only makes sense in the scalable context and the intermediate results should not be used elsewhere. -- cheers, --renato
2018 Jun 05
14
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
Hi, Now that Sander has committed enough MC support for SVE, here's an updated RFC for variable length vector support with a set of 14 patches (listed at the end) to demonstrate code generation for SVE using the extensions proposed in the RFC. I have some ideas about how to support RISC-V's upcoming extension alongside SVE; I'll send an email with some additional comments on