search for: sreg

...avindh@virtuata.com> diff -r e62ab14d44af -r babbb3e0f4d3 xen/arch/x86/domctl.c --- a/xen/arch/x86/domctl.c Fri Apr 20 11:36:02 2012 -0700 +++ b/xen/arch/x86/domctl.c Fri Apr 20 17:55:49 2012 -0700 @@ -1592,6 +1592,12 @@ void arch_get_info_guest(struct vcpu *v, c.nat->user_regs.fs = sreg.sel; hvm_get_segment_register(v, x86_seg_gs, &sreg); c.nat->user_regs.gs = sreg.sel; +#ifdef __x86_64__ + if ( ring_0(&c.nat->user_regs) ) + c.nat->gs_base_kernel = sreg.base; + else + c.nat->gs_base_user = sreg.base; +#endif...

..._edge, %entry %sum.0.lcssa = phi i32 [ %8, %for.cond.for.end_crit_edge ], [ 0, %entry ] ret i32 %sum.0.lcssa } The emitted blocks are: Function Live Ins: %R0 in %vreg2 BB#0: derived from LLVM BB %entry Live Ins: %R0 %vreg2<def> = COPY %R0; IntRegs:%vreg2 %vreg3<def> = MV 0; SRegs:%vreg3 CMP %vreg2, 1, %FLAG<imp-def>; IntRegs:%vreg2 %vreg6<def> = COPY %vreg3; SRegs:%vreg6,%vreg3 BR_cc <BB#2>, 20, %FLAG<imp-use,kill> BR <BB#1> Successors according to CFG: BB#1(20) BB#2(12) BB#1: derived from LLVM BB %for.cond.for.end_crit_edge Prede...

...list, I have a linear regression ctl <- c(4.17,5.58,5.18,6.11,4.50,4.61,5.17,4.53,5.33,5.14) trt <- c(4.81,4.17,4.41,3.59,5.87,3.83,6.03,4.89,4.32,4.69) group <- gl(2,10,20, labels=c("Ctl","Trt")) weight <- c(ctl, trt) reg <- lm(weight ~ group) sreg <- summary(reg) and I would like to dump exactly what I see on the console with print(sreg) to a text file. I've tried using cat but it did not work. I've read the list questions but I did not see a solution. Can you help with this? Thank you, Adrian Dragulescu

...gt; ret i32 %sum.0.lcssa >> } >> >> >> The emitted blocks are: >> Function Live Ins: %R0 in %vreg2 >> >> BB#0: derived from LLVM BB %entry >> Live Ins: %R0 >> %vreg2<def> = COPY %R0; IntRegs:%vreg2 >> %vreg3<def> = MV 0; SRegs:%vreg3 >> CMP %vreg2, 1, %FLAG<imp-def>; IntRegs:%vreg2 >> %vreg6<def> = COPY %vreg3; SRegs:%vreg6,%vreg3 >> BR_cc <BB#2>, 20, %FLAG<imp-use,kill> >> BR <BB#1> >> Successors according to CFG: BB#1(20) BB#2(12) >> >> BB#...

...erand of every load and store is a GEP instruction. For simple stuff i am getting the right answer but when the index expression becomes more complex multiple GEPs are introduced. For instance: *(A+2*(blockDim.x*blockIdx.x+threadIdx.x+1)+2+3) = 5; produces:   %6 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()   %7 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()   %8 = mul i32 %6, %7,   %9 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()   %10 = add i32 %8, %9,   %11 = add i32 %10, 1,   %12 = mul i32 2, %11,   %13 = zext i32 %12 to i64,   %14 = getelementptr inbounds i32, i32* %0, i64 %13   %1...

...vCPU index and the event id:: + + struct kvmi_event { + __u16 size; + __u16 vcpu; + __u8 event; + __u8 padding[3]; + struct kvmi_event_arch arch; + } + +On x86 the structure looks like this:: + + struct kvmi_event_arch { + __u8 mode; + __u8 padding[7]; + struct kvm_regs regs; + struct kvm_sregs sregs; + struct { + __u64 sysenter_cs; + __u64 sysenter_esp; + __u64 sysenter_eip; + __u64 efer; + __u64 star; + __u64 lstar; + __u64 cstar; + __u64 pat; + __u64 shadow_gs; + } msrs; + }; + +It contains information about the vCPU state at the time of the event. + +The reply to...

...>>>> The emitted blocks are: >>>> Function Live Ins: %R0 in %vreg2 >>>> >>>> BB#0: derived from LLVM BB %entry >>>> Live Ins: %R0 >>>> %vreg2<def> = COPY %R0; IntRegs:%vreg2 >>>> %vreg3<def> = MV 0; SRegs:%vreg3 >>>> CMP %vreg2, 1, %FLAG<imp-def>; IntRegs:%vreg2 >>>> %vreg6<def> = COPY %vreg3; SRegs:%vreg6,%vreg3 >>>> BR_cc <BB#2>, 20, %FLAG<imp-use,kill> >>>> BR <BB#1> >>>> Successors according to CFG: BB...

...ad it tries to restore it only right before register it is freeing up. Maybe I'm misunderstanding this code. // If the target knows how to save/restore the register, let it do so; // otherwise, use the emergency stack spill slot. if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { // Spill the scavenged register before I. assert(ScavengingFrameIndex >= 0 && "Cannot scavenge register without an emergency spill slot!"); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC,TRI); MachineBasicBlock::it...

...RACT LO BYTE OF B %reg16389<def> = COPY %reg16384:ssub_1; GPR8:%reg16389 WDREGS:%reg16384 // EXTRACT HI BYTE OF A %reg16390<def> = COPY %reg16385:ssub_1; GPR8:%reg16390 WDREGS:%reg16385 // EXTRACT HI BYTE OF B %reg16391<def> = ADDRdRr %reg16388, %reg16387<kill>, %SREG<imp-def>; GPR8:%reg16391,16388,16387 // ADD LO BYTES %reg16392<def> = ADCRdRr %reg16390, %reg16389<kill>, %SREG<imp-def,dead>, %SREG<imp-use>; GPR8:%reg16392,16390,16389 // ADDC HI BYTES %reg16393<def> = REG_SEQUENCE %reg16391<kill>, ssub_0, %reg163...

...n 0; } +void kvm_arch_vcpu_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) +{ + __get_regs(vcpu, regs); +} + static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) { vcpu->arch.emulate_regs_need_sync_from_vcpu = true; @@ -8710,6 +8715,11 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, return 0; } +void kvm_arch_vcpu_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) +{ + __get_sregs(vcpu, sregs); +} + int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, struct kvm_mp_state *mp_state) { diff --git a/include/linux/kvm_host.h b/i...

...gt;>>>> Function Live Ins: %R0 in %vreg2 >>>>>> >>>>>> BB#0: derived from LLVM BB %entry >>>>>> Live Ins: %R0 >>>>>> %vreg2<def> = COPY %R0; IntRegs:%vreg2 >>>>>> %vreg3<def> = MV 0; SRegs:%vreg3 >>>>>> CMP %vreg2, 1, %FLAG<imp-def>; IntRegs:%vreg2 >>>>>> %vreg6<def> = COPY %vreg3; SRegs:%vreg6,%vreg3 >>>>>> BR_cc <BB#2>, 20, %FLAG<imp-use,kill> >>>>>> BR <BB#1> >>>>...

...6:32:64" target triple = "nvptx64-unknown-unknown" @__kernelgen_version = constant [15 x i8] c"0.2/1654:1675M\00" define ptx_kernel void @__kernelgen_matvec_loop_7(i32* nocapture) #0 { "Loop Function Root": %tid.x = tail call ptx_device i32 @llvm.nvvm.read.ptx.sreg.tid.x() %ctaid.x = tail call ptx_device i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() %PositionOfBlockInGrid.x = shl i32 %ctaid.x, 9 %BlockLB.Add.ThreadPosInBlock.x = add i32 %PositionOfBlockInGrid.x, %tid.x %isThreadLBgtLoopUB.x = icmp sgt i32 %BlockLB.Add.ThreadPosInBlock.x, 65535 br i1 %isThr...

...getting the right answer but when the index > > expression becomes more complex multiple GEPs are introduced. For > > instance: > > > > *(A+2*(blockDim.x*blockIdx.x+threadIdx.x+1)+2+3) = 5; > > > > produces: > > > > %6 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() > > %7 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() > > %8 = mul i32 %6, %7, > > %9 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() > > %10 = add i32 %8, %9, > > %11 = add i32 %10, 1, > > %12 = mul i32 2, %11, > > %13 = zext i32 %12 to i...

...only right before register it is freeing up. > > Maybe I'm misunderstanding this code. > > // If the target knows how to save/restore the register, let it do so; > // otherwise, use the emergency stack spill slot. > if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { > // Spill the scavenged register before I. > assert(ScavengingFrameIndex >= 0 && > "Cannot scavenge register without an emergency spill slot!"); > TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, > RC,TRI); >...

From: Mihai Don?u <mdontu at bitdefender.com> This command is used to get kvm_regs and kvm_sregs structures, plus the list of struct kvm_msrs. Signed-off-by: Mihai Don?u <mdontu at bitdefender.com> Co-developed-by: Adalbert Laz?r <alazar at bitdefender.com> Signed-off-by: Adalbert Laz?r <alazar at bitdefender.com> --- Documentation/virt/kvm/kvmi.rst | 42 ++++...

Dear all, Attached notunrolled.ll is a module containing reduction kernel. What I'm trying to do is to unroll it in such way, that partial reduction on unrolled iterations would be performed on register, and then stored to memory only once. Currently llvm's unroller together with all standard optimizations produce code, which stores value to memory after every unrolled iteration, which is

...STORE/SWAP/ADD - Restore the status register I’d really like to be able to do this at the IR level. What I want to do is write a custom lowering hook to convert ISD::ATOMIC_LOAD into a standard ISD::LOAD with the save/restore/interrupt nodes glued to it. Here’s what I have so far: // Store `SREG` auto Save = DAG.getCopyFromReg(DAG.getEntryNode(), DL, AVR::SREG, MVT::i8); // Disable interrupts (`clr` is equivalent to `bclr 7`). auto ClearInterrupts = DAG.getNode(AVRISD::BCLR, DL, MVT::Glue, DAG.getConstant(7, DL, MVT::i8)); // Perform the nonatomic load. auto *Node = cast<Ato...

From: Mihai Don?u <mdontu at bitdefender.com> This command is used to get kvm_regs and kvm_sregs structures, plus a list of struct kvm_msrs from a specific vCPU. While the kvm_regs and kvm_sregs structures are included with every event, this command allows reading any MSR and can be used as a quick way to read the state of any vCPU. Signed-off-by: Mihai Don?u <mdontu at bitdefender.com&g...

...2.16 21 31 408 1 220 2.03 22 32 408 1 220 2.03 23 33 504 1 220 2.03 24 34 504 1 220 2.03 25 35 504 1 220 2.03 26 36 528 0 220 2.03 27 37 528 0 220 2.03 28 38 528 0 220 2.03 29 39 528 0 220 2.03 30 40 528 0 220 2.03 > > mot.sreg<-survreg(Surv(time,status)~x,dist="weibull",data=motor) > anova(mot.sreg) Df Deviance Resid. Df -2*LL P(>|Chi|) NULL NA NA 28 311.3634 NA x -1 22.77348 27 288.5900 NA #this is the problem... > summary(mot.sreg) Call: survreg(formu...

...mi.c @@ -5,8 +5,61 @@ * Copyright (C) 2019-2020 Bitdefender S.R.L. */ +#include "linux/kvm_host.h" +#include "x86.h" #include "../../../virt/kvm/introspection/kvmi_int.h" +static unsigned int kvmi_vcpu_mode(const struct kvm_vcpu *vcpu, + const struct kvm_sregs *sregs) +{ + unsigned int mode = 0; + + if (is_long_mode((struct kvm_vcpu *) vcpu)) { + if (sregs->cs.l) + mode = 8; + else if (!sregs->cs.db) + mode = 2; + else + mode = 4; + } else if (sregs->cr0 & X86_CR0_PE) { + if (!sregs->cs.db) + mode = 2; + else + mode = 4; +...