search for: spuregisterinfo

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2010 Feb 26
3
[LLVMdev] Patch - big stackframes on SPU
.... (Seems that all test case failures are due to this - not bad code or asserts). But inserting redundant code ofcourse bloats the generated code... Would it be possible to conditionally enable the register scavenger only if the function has a big stack? It now gets unconditionally enabled in SPURegisterInfo::requiresRegisterScavenging(const MachineFunction &MF). Just checking MF.getFrameInfo()->getStackSize() here doesn't seem to be the solution... kalle -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: bigstack.ll URL: <http://lis...
2010 Feb 26
0
[LLVMdev] Patch - big stackframes on SPU
Hello > Would it be possible to conditionally enable the register scavenger only if > the function has a big stack? It now gets unconditionally enabled in >  SPURegisterInfo::requiresRegisterScavenging(const MachineFunction &MF). > Just checking MF.getFrameInfo()->getStackSize() here doesn't seem to be the > solution... Well, I think no. regscavenger should work well regardless of any settings. Currently it's heavily used for ARM, so, you might wan...
2010 Feb 24
0
[LLVMdev] Patch - big stackframes on SPU
On Feb 22, 2010, at 6:08 AM, Kalle.Raiskila at nokia.com wrote: > Hello all, > > currently the SPU backend does not handle big stack frames (>16*511 > bytes) nicely. llc asserts on malformed machine instructions. > (Assertion `MI->getOperand(OpNo).isImm() && "printDFormAddr first > operand is not immediate") Sounds fine to me in general. Please write a
2010 Feb 22
2
[LLVMdev] Patch - big stackframes on SPU
Hello all, currently the SPU backend does not handle big stack frames (>16*511 bytes) nicely. llc asserts on malformed machine instructions. (Assertion `MI->getOperand(OpNo).isImm() && "printDFormAddr first operand is not immediate") E.g. the function: define i32 @foo() nounwind { entry: %retval = alloca i32 %big_data = alloca [1000 x i32] store i32 3840, i32*