search for: spillsize

Displaying 4 results from an estimated 4 matches for "spillsize".

2009 Apr 28
1
[LLVMdev] Register class intersection
...VR128 This seems perfectly reasonable - choose the larger spill size and avoid losing data. TableGen thinks these classes are unrelated - it currently defines register subclasses as follows: A is a subclass of B iff A != B and A.Regs is a subset of B.Regs (subset means improper subset) and A.SpillSize == B.SpillSize Since the spill sizes differ, FR64 and VR128 have no sub/super class relation. I propose that we change the definition to: A is a subclass of B iff A != B and A.Regs is a subset of B.Regs and A.SpillSize >= B.SpillSize and A.SpillAlignment is divided by B.SpillAlignment This...
2019 Jul 18
2
Question about TableGen RegisterClass definition
...egisterClass definition. I need to map different size of MVTs into a register class as below. def TestReg : RegisterClass<"Test", [v8i32, v4i32], ...> When I look at TableGen and CodeGen, it looks the types are used as following: 1. MCRegisterClass's RegSize and Alignment 2. SpillSize in TableGen 3. Type constraint for instruction pattern matching >From my opinion, it seems it is possible to do it... but I am not 100% sure... If anyone has information about it, please give me comment. Thanks JinGu Kang Software Engineer Codeplay Software Ltd Level C Argyle House, 3 Lady L...
2016 Sep 24
2
RFC: Implement variable-sized register classes
...9;t matter how it works under the hood to the average backend > writer. I agree with the complexity, but I would hope that more documentation, examples and explanations would clarify it. > What if RegisterClass contained a `list<RCInfo>`. Each RCInfo contains > RegTypes, RegSize, SpillSize, and SpillAlignment as well as a > Predicate the determines whether this individual RCInfo is the one > that should apply. To my taste this seems easier to understand than > the {Int,ValueType,ValueTypeList}Select mechanism. The "select" mechanism was intended to be extendable t...
2016 Sep 20
7
RFC: Implement variable-sized register classes
...ent information. If defined, they would take precedence over the existing members RegTypes/Size/Alignment. class RegisterClass { ... ValueTypeListSelect VarRegTypes; // The names of these members IntSelect VarRegSize; // could likely be improved... IntSelect VarSpillSize; // IntSelect VarSpillAlignment // } To fully implement the AddReg instruction, the target would then define the register class: class MyRegisterClass : RegisterClass<...> { let VarRegTypes = ValueTypeListSelect<[Mode64, Mode128], [[i64, v2i...