Displaying 20 results from an estimated 93 matches for "sib".
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2012 Jan 18
4
confint function in MASS package for logistic regression analysis
I have the following binary data set:
Sex
Response 0 1
0 159 162
1 4 37
My commands
library(MASS)
sib.glm=glm(sib~sex,family=binomial,data=sib.data)
summary(sib.glm)
The coefficients in the output are
Estimate Std. Error z value Pr(>|z|)
(Intercept) -3.6826 0.5062 -7.274 3.48e-13 ***
sex 2.2059 0.5380 4.100 4.13e-05 ***
I have calculated...
2006 May 30
1
sib TDT transmission/disequilibrium test
Does anyone know if the sib TDT has been implemented in R
1. Spielman, R.S., and Ewens, W.J. (1998) A sibship test for linkage in the
presence of association: the sib transmission/disequilibrium test. Am J Hum
Genet 62, 450-458
--
Farrel Buchinsky, MD
Pediatric Otolaryngologist
Allegheny General Hospital
Pittsburgh, PA
2007 Oct 11
1
constraining correlations
Hello,
I've searched for an answer to no avail. I am wondering if anyone
knows how to constrain certain correlations to be equal. I have family
data with 2 twins per family plus up to 2 siblings. I would like to
somehow constrain all the sibling correlations (twin-sib and sib-sib)
to be the same while allowing the twin-twin correlation to be
different. Here is some simulated code:
set.seed(5)
famdata <- matrix(rnorm(400),ncol=4,dimnames=list(NULL,c("Twin1","Twin2&qu...
2013 Sep 12
1
[LLVMdev] bug in X86 disasm code?
hi,
i found this code in X86DisassemblerDecoder.h
#define EA_BASES_32BIT \
ENTRY(EAX) \
ENTRY(ECX) \
ENTRY(EDX) \
ENTRY(EBX) \
ENTRY(sib) \
ENTRY(EBP) \
ENTRY(ESI) \
ENTRY(EDI) \
ENTRY(R8D) \
ENTRY(R9D) \
ENTRY(R10D) \
ENTRY(R11D) \
ENTRY(R12D) \
ENTRY(R13D) \
ENTRY(R14D) \
ENTRY(R15D)
the ENTRY...
2009 May 05
1
[LLVMdev] [PATH] Fixes for the amd64 JIT code
Hi,
It looks like the problem was with the RIP relative addressing. The
original patch mistakenly
removed the || DispForReloc part because I tough that the RIP relative
addressing was done
by the SIB encodings, but it is actually done by the shorter ones.
The attached patch seems to work for me on linux and when simulating darwin
by forcing some variables in X86TargetMachine.cpp to their darwin values.
Zoltan
On Tue, May 5, 2009 at 11:17 PM, Zoltan Varga <va...
2009 May 05
2
[LLVMdev] [PATH] Fixes for the amd64 JIT code
Hi Zoltan,
The part that determines whether SIB byte is needed caused a lot of
regressions last night (see Geryon-X86-64 etc.). I've reverted it for
now. Please take a look.
Thanks,
Evan
On May 4, 2009, at 3:49 PM, Evan Cheng wrote:
> Committed as revision 70929. Thanks.
>
> Evan
>
> On May 3, 2009, at 8:29 PM, vargaz...
2009 May 05
0
[LLVMdev] [PATH] Fixes for the amd64 JIT code
...or with
the encoding of R12/R13, but the code seems to handle the latter, since it
checks for
ESP/EBP which is the same as R12/R13.
Zoltan
On Tue, May 5, 2009 at 8:18 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> Hi Zoltan,
>
> The part that determines whether SIB byte is needed caused a lot of
> regressions last night (see Geryon-X86-64 etc.). I've reverted it for
> now. Please take a look.
>
> Thanks,
>
> Evan
>
> On May 4, 2009, at 3:49 PM, Evan Cheng wrote:
>
> > Committed as revision 70929. Thanks.
> >
> >...
2009 May 04
3
[LLVMdev] [PATH] Fixes for the amd64 JIT code
...gt; On May 1, 2009, at 8:40 AM, Zoltan Varga wrote:
>
>> Hi,
>>
>> The attached patch contains the following changes:
>>
>> * X86InstrInfo.cpp: Synchronize a few places with the code in
>> X86CodeEmitter.cpp
>> * X86CodeEmitter.cpp: Avoid the longer SIB encoding on amd64 if it
>> is not neeed.
>>
>> Zoltan
>> <llvm.diff>_______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman...
2016 Nov 23
4
RFC: code size reduction in X86 by replacing EVEX with VEX encoding
Hi All.
This is an RFC for a proposed target specific X86 optimization for reducing code size in the encoding of AVX-512 instructions when possible.
When the AVX512F instruction set was introduced in X86 it included additional 32 registers of 512bit size each ZMM0 - ZMM31, as well as additional 16 XMM registers XMM16-XMM31 and 16 YMM registers YMM16-YMM31.
In order to encode the new registers of 16-31 and the additional instructions, a new...
2009 May 01
2
[LLVMdev] [PATH] Fixes for the amd64 JIT code
Hi,
The attached patch contains the following changes:
* X86InstrInfo.cpp: Synchronize a few places with the code in
X86CodeEmitter.cpp
* X86CodeEmitter.cpp: Avoid the longer SIB encoding on amd64 if it is not
neeed.
Zoltan
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2008 Jan 10
2
Switch from courier to dovecot
I have an courier IMAP server running. To get sib dirs working I had to
rename them all to begin with a period ".".
e.g
Maildir
Maildir/{cur,new,tmp}
Maildir/.account1/{cur,new,tmp}
Maildir/.account2/{cur,new,tmp}
Maildir/.account3/{cur,new,tmp}
etc
If I uninstall Courier and install dovecot, will these "period" dirs be
see...
2012 Jan 29
0
Using influence plots and obtaining id numbers
I am a novice R user, and I am having difficulty understanding R's influence
plots.
I am trying to remove outliers from a particular variable, "sib." I am able
to generate influence plots and further outlier information such as below
(which is a shortened example). For my analyses, I end up excluding the
points R refers to, 7, 18, 26, and 105. However, my question is, how can I
understand which ID numbers these points (7,18,26, and 105) a...
2013 Jun 22
0
R-help Digest, Vol 124, Issue 22
"Vallejo, Roger" <Roger.Vallejo at ARS.USDA.GOV> asked:
> I would like to know if we can estimate Rg between two binary traits
> (disease status: alive vs. dead) with the R package.
>
> My data: we have 100 full-sib (FS) families,
> and two random samples (each with n= 200 FS fish) from each FS family
> were evaluated for disease resistance to two different bacterial
> diseases, separately. Both traits are not recorded in the same
> individual; both traits are recorded in different full-sibs from a...
2009 May 04
0
[LLVMdev] [PATH] Fixes for the amd64 JIT code
...AM, Zoltan Varga wrote:
>>
>>> Hi,
>>>
>>> The attached patch contains the following changes:
>>>
>>> * X86InstrInfo.cpp: Synchronize a few places with the code in
>>> X86CodeEmitter.cpp
>>> * X86CodeEmitter.cpp: Avoid the longer SIB encoding on amd64 if it
>>> is not neeed.
>>>
>>> Zoltan
>>> <llvm.diff>_______________________________________________
>>> LLVM Developers mailing list
>>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
>>> http://...
2008 May 06
4
categorical data analysis
hie all
i am trying to carry out a categorical data analysis but my problem is that when in i use the chi squared test some of my expected values are less than 5. is there a test that can handle this situation. the data is not a 2*2 table. its more from the social sciences where you have from strongly agree to strongly disagree. i know i can collapse vthe tables but there is a loss of
2007 May 03
2
Single Title for the Multiple plot page
...s in same page using
par(mfrow = c(*,*)). In each plot we can set title
using main and sub commands.
However, is there any way that we can place an
universal title above the set of plots placed in the
same page (not individual plot titles, all i need is a
title of the whole graph page) as well as sib-titles?
Do I need any package to do so?
Thank you for your time.
Mohammad Ehsanul Karim (R - 2.3.1 on windows)
Institute of Statistical Research and Training
University of Dhaka
2016 Nov 23
2
RFC: code size reduction in X86 by replacing EVEX with VEX encoding
...42 AM
> *Subject: *[llvm-dev] RFC: code size reduction in X86 by replacing EVEX
> with VEX encoding
>
>
>
> Hi All.
>
>
>
> This is an RFC for a proposed target specific X86 optimization for
> reducing code size in the encoding of AVX-512 instructions when possible.
>
>
>
> When the AVX512F instruction set was introduced in X86 it included
> additional 32 registers of 512bit size each ZMM0 - ZMM31, as well as
> additional 16 XMM registers XMM16-XMM31 and 16 YMM registers YMM16-YMM31.
>
> In order to encode the new registers of 16-31...
2009 May 01
0
[LLVMdev] [PATH] Fixes for the amd64 JIT code
Looks good. Thanks.
Evan
On May 1, 2009, at 8:40 AM, Zoltan Varga wrote:
> Hi,
>
> The attached patch contains the following changes:
>
> * X86InstrInfo.cpp: Synchronize a few places with the code in
> X86CodeEmitter.cpp
> * X86CodeEmitter.cpp: Avoid the longer SIB encoding on amd64 if it
> is not neeed.
>
> Zoltan
> <llvm.diff>_______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
2007 Aug 30
0
R-help Digest, Vol 54, Issue 30
...h.
>
> These identifiers are not numeric, or not sequential.
>
> Obviously, an identifier can appear in one or two columns,
> depending on whether it was a parent or not. These should
> be consistent.
>
> Not all identifiers appear in the individual column - it
> is possible for a parent not to have its own record if its
> parents were not known.
>
> Missing parental (sire and/or dam) identifiers can occur.
>
> I need to export the data for use in another program that
> requires the pedigree to be coded as integers, increasing
> with date of bi...
2001 Sep 20
1
rsync via ssh
...e under what
circumstances these problems occur, but I hope
someone might have some idea...
thanks
--
Ivan Ivanyi
Swiss Institute of Bioinformatics
1, rue Michel Servet
CH-1211 Gen?ve 4
Switzerland
Tel: (+41 22) 702 58 33
Fax: (+41 22) 702 58 58
E-mail: Ivan.Ivanyi@isb-sib.ch