search for: shl_part

Dear All, I think I understand the motivation for these node types, but I'm not positive: " /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded /// integer shift operations, just like ADD/SUB_PARTS. The operation /// ordering is: /// [Lo,Hi] = op [LoLHS,HiLHS], Amt SHL_PARTS, SRA_PARTS, SRL_PARTS " Okay, for one thing, I can't find a reference to...

...without hacking on code outside of my target's (/lib/Target/x65 in this case). To be 100% clear, I actually already did attempt this route, and when compiling received an error that GetExpandedInteger was a private method. What I would ultimately like to lower this to is probably a 16-bit ISD::SHL_PARTS, which I'd then further lower to a sequence of pairs of { shift left, rotate left through carry} instructions. Example of how that would look in relation to the aforementioned example: asl %b rol %c asl %b rol %c There doesn't seem to be a set of standard node types analogous to ADD / AD...

...cking on code outside of my target's (/lib/Target/x65 in this case). To be 100% clear, I actually already did attempt this route, and when compiling received an error that GetExpandedInteger was a private method. > > What I would ultimately like to lower this to is probably a 16-bit ISD::SHL_PARTS, which I'd then further lower to a sequence of pairs of { shift left, rotate left through carry} instructions. Example of how that would look in relation to the aforementioned example: > > asl %b > rol %c > asl %b > rol %c > > There doesn't seem to be a set of standa...

...code outside of my target's (/lib/Target/x65 in this case). To be 100% clear, I actually already did attempt this route, and when compiling received an error that GetExpandedInteger was a private method. >> >> What I would ultimately like to lower this to is probably a 16-bit ISD::SHL_PARTS, which I'd then further lower to a sequence of pairs of { shift left, rotate left through carry} instructions. Example of how that would look in relation to the aforementioned example: >> >> asl %b >> rol %c >> asl %b >> rol %c >> >> There doesn'...

...et's (/lib/Target/x65 in this case). To be 100% clear, I > actually already did attempt this route, and when compiling received an > error that GetExpandedInteger was a private method. > >> > >> What I would ultimately like to lower this to is probably a 16-bit > ISD::SHL_PARTS, which I'd then further lower to a sequence of pairs of { > shift left, rotate left through carry} instructions. Example of how that > would look in relation to the aforementioned example: > >> > >> asl %b > >> rol %c > >> asl %b > >> rol %c &...

...bout the logic of this function. if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1))) { <== False ... } if (ExpandShiftWithKnownAmountBit(N, Lo, Hi)) { <== The call returns False ... } if (N->getOpcode() == ISD::SHL) { <== Branch taken PartsOpc = ISD::SHL_PARTS; } else if (N->getOpcode() == ISD::SRL) { ... } else { ... } if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || Action == TargetLowering::Custom) { <== False ... } if (N->getOpcode() == ISD::SHL) { <== Branch taken } else if (N->getOpcode() == ISD...

Hi Javier, > The problem is the implementation of the expansion. Perhaps an example > can help illustrate better. Take the case of a 64-bit integer shifted > left by say 6 bits and is decomposed using 32-bit registers. Because 6 > is less than the 32 (the register size) the resulting low part should be > equal to the source low part shifted left by 6 bits. The current >

Hi Duncan, The problem is the implementation of the expansion. Perhaps an example can help illustrate better. Take the case of a 64-bit integer shifted left by say 6 bits and is decomposed using 32-bit registers. Because 6 is less than the 32 (the register size) the resulting low part should be equal to the source low part shifted left by 6 bits. The current implementation places a zero

...// These should be replaced by UDVIREM, but it does not happen automatically > // during Type Legalization > setOperationAction(ISD::UDIV, MVT::i64, Custom); > @@ -578,6 +585,34 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const > case ISD::SHL_PARTS: return LowerSHLParts(Op, DAG); > case ISD::SRA_PARTS: > case ISD::SRL_PARTS: return LowerSRXParts(Op, DAG); > + case ISD::UADDO: { > + SDLoc DL(Op); > + EVT VT = Op.getValueType(); > + > + SDValue Lo = Op.getOperand(0); > + SDValue Hi = Op.getOperand(1);...

On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: > Can you explain why you chose the approach of using a new pass? > I pictured removing LegalizeDAG's type legalization code would > mostly consist of finding all the places that use TLI.getTypeAction > and just deleting code for handling its Expand and Promote. Are you > anticipating something more

On May 20, 2009, at 1:34 PM, Eli Friedman wrote: > On Wed, May 20, 2009 at 1:19 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> Per subject, this patch adding an additional pass to handle vector >> >> operations; the idea is that this allows removing the code from >> >> LegalizeDAG that handles illegal types, which should be a significant

...Lo.getValue(1); - Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3); - break; - } - } - - // If we can emit an efficient shift operation, do so now. - if (ExpandShift(ISD::SHL, Node->getOperand(0), ShiftAmt, Lo, Hi, dl)) - break; - - // If this target supports SHL_PARTS, use it. - TargetLowering::LegalizeAction Action = - TLI.getOperationAction(ISD::SHL_PARTS, NVT); - if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || - Action == TargetLowering::Custom) { - ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0), -...