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shiftrotatebyonealias
2012 Feb 03
0
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...> Mips64InstrInfo.td:173:1: error: error: unable to find operand: 'zero'
> def DSDIV : Div64<MipsDivRem, 0x1e, "ddiv", IIIdiv>;
> ^
>
That's a bug/limitation of the asm matcher. For something similar, see X86InstrInfo.td's commented out definition of ShiftRotateByOneAlias.
-Jim
> Any information on this would be great.
>
> Cheers,
>
> Jack
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2012 Jan 26
2
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
I'm trying to generate MipsGenAsmMatcher.inc for MipsAsmParser.cpp.
What added restrictions for the .td file contents are there for tblgen -gen-asm-matcher?
For the Mips platform we create the following .inc files through tblgen.
tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM MipsGenCodeEmitter.inc -gen-emitter)