search for: setsubreg

..."inconsistent operand info for 2-reg pass"); if (MO.isKill()) { MO.setIsKill(false); RemovedKillFlag = true; } + unsigned regASubIdx = mi->getOperand(DstIdx).getSubReg(); MO.setReg(regA); + MO.setSubReg(regASubIdx); } /Mikael Holmén

...ake some changes. But what? This is quite simple to handle. A register MachineOperand has a subreg field for this purpose. It is used to pick out subregisters of a virtual register. For a physical register: MO.setReg(TRI.getSubReg(Reg, SubIdx)); For a virtual register: MO.setReg(Reg); MO.setSubReg(SubIdx); If you are using BuildMI, the subreg is passed as the third argument to addReg(). The register allocator (rewriter to be exact) will clear the subreg field when substituting the allocated physical register. Note that a physical register operand may not have a subreg. It must be 0. /jak...

Does anybody have any tips for generating spills/reloads for large non-vector registers? I'm working on a back end for a DSP architecture that has accumulator registers that are too large to be spilled or reloaded with a single instruction. All of their bits can be accessed in word-size chunks via three sub-registers (low, high, and ext). So loading or storing one requires three instructions:

...tch it. The VirtRegMap::rewrite() method sidesteps this issue by rewriting physreg operands to remove the subreg field. The code for this is in VirtRegMap.cpp, around line 165. In short: PhysReg = MO.getReg(); if (MO.getSubReg() != 0) { PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); MO.setSubReg(0); } MO.setReg(PhysReg); Adding this code to Gcra fixes the assembly issue for me. I've attached my updated copy. Hope this helps. Cheers, Lang. On Sun, Nov 4, 2012 at 2:08 PM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > My tst.bc is attached. I had to use ssh to copy it fr...

...sreg operands to remove the subreg field. The code for this is in >>> VirtRegMap.cpp, around line 165. In short: >>> >>> PhysReg = MO.getReg(); >>> if (MO.getSubReg() != 0) { >>> PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); >>> MO.setSubReg(0); >>> } >>> MO.setReg(PhysReg); >>> >>> Adding this code to Gcra fixes the assembly issue for me. I've attached >>> my updated copy. Hope this helps. >>> >>> Cheers, >>> Lang. >>> >>> >>> On Sun...

...ubreg field. The code for > this is in > VirtRegMap.cpp, around line 165. In short: > > PhysReg = MO.getReg(); > if (MO.getSubReg() != 0) { > PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); > MO.setSubReg(0); > } > MO.setReg(PhysReg); > > Adding this code to Gcra fixes the assembly issue for me. > I've attached > my updated copy. Hope this helps. > > Cheers, > Lang. > > >...

...ethod sidesteps this issue by rewriting > physreg operands to remove the subreg field. The code for this is in > VirtRegMap.cpp, around line 165. In short: > > PhysReg = MO.getReg(); > if (MO.getSubReg() != 0) { > PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); > MO.setSubReg(0); > } > MO.setReg(PhysReg); > > Adding this code to Gcra fixes the assembly issue for me. I've attached > my updated copy. Hope this helps. > > Cheers, > Lang. > > > On Sun, Nov 4, 2012 at 2:08 PM, Susan Horwitz <horwitz at cs.wisc.edu > <mailto:horwi...

...y rewriting >> physreg operands to remove the subreg field. The code for this is in >> VirtRegMap.cpp, around line 165. In short: >> >> PhysReg = MO.getReg(); >> if (MO.getSubReg() != 0) { >> PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); >> MO.setSubReg(0); >> } >> MO.setReg(PhysReg); >> >> Adding this code to Gcra fixes the assembly issue for me. I've attached >> my updated copy. Hope this helps. >> >> Cheers, >> Lang. >> >> >> On Sun, Nov 4, 2012 at 2:08 PM, Susan Horwitz <...

My tst.bc is attached. I had to use ssh to copy it from my office machine to my home laptop. In case that corrupts it, I also put a copy here: http://pages.cs.wisc.edu/~horwitz/LANG/tst.bc I created the file like this: clang -emit-llvm -O0 -c tst.c -o tst.bc opt -mem2reg tst.bc > tst.mem2reg mv tst.mem2reg tst.bc Susan On 11/4/2012 3:27 PM, Lang Hames wrote: > Hi Susan, >

...the subreg field. The code for this is in >>>> VirtRegMap.cpp, around line 165. In short: >>>> >>>> PhysReg = MO.getReg(); >>>> if (MO.getSubReg() != 0) { >>>> PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); >>>> MO.setSubReg(0); >>>> } >>>> MO.setReg(PhysReg); >>>> >>>> Adding this code to Gcra fixes the assembly issue for me. I've attached >>>> my updated copy. Hope this helps. >>>> >>>> Cheers, >>>> Lang. >>>&...

...his is in >> VirtRegMap.cpp, around line 165. In short: >> >> PhysReg = MO.getReg(); >> if (MO.getSubReg() != 0) { >> PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); >> MO.setSubReg(0); >> } >> MO.setReg(PhysReg); >> >> Adding this code to Gcra fixes the assembly issue for >> me. I've attached >> my updated copy. Hope this helps. >> >>...

...de for this is in >>>>> VirtRegMap.cpp, around line 165. In short: >>>>> >>>>> PhysReg = MO.getReg(); >>>>> if (MO.getSubReg() != 0) { >>>>> PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); >>>>> MO.setSubReg(0); >>>>> } >>>>> MO.setReg(PhysReg); >>>>> >>>>> Adding this code to Gcra fixes the assembly issue for me. I've attached >>>>> my updated copy. Hope this helps. >>>>> >>>>> Cheers, >>...

...irtRegMap.cpp, around line 165. In short: >>> >>> PhysReg = MO.getReg(); >>> if (MO.getSubReg() != 0) { >>> PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg()); >>> MO.setSubReg(0); >>> } >>> MO.setReg(PhysReg); >>> >>> Adding this code to Gcra fixes the assembly issue >>> for me. I've attached >>> my updated copy. Ho...

...ort: >>>> >>>> PhysReg = MO.getReg(); >>>> if (MO.getSubReg() != 0) { >>>> PhysReg = TRI->getSubReg(PhysReg, >>>> MO.getSubReg()); >>>> MO.setSubReg(0); >>>> } >>>> MO.setReg(PhysReg); >>>> >>>> Adding this code to Gcra fixes the assembly issue >>>> for me. I've attached >>>>...