Displaying 4 results from an estimated 4 matches for "setimm".
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2015 Apr 23
4
[LLVMdev] IRBuilder and "ad hoc" optimizations
Hi LLVM,
IRBuilder can fold constants (that behaviour can be controlled by Folder
type). What do you think about optionally allow IRBuilder to eliminate
no-op instructions like `add %a, 0` or `memcpy(%a, %b, 0)`?
- Paweł
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2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...quot;
> #include "llvm/Support/CommandLine.h"
> +#include "llvm/Target/TargetAsmInfo.h"
> using namespace llvm;
>
> extern cl::opt<bool> EnablePPC32RS; // FIXME (64-bit): See
> PPCRegisterInfo.cpp.
> @@ -724,3 +725,21 @@
>
> Cond
> [0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm()));
> return false;
> }
> +
> +/// GetInstSize - Return the number of bytes of code the specified
> +/// instruction may be. This returns the maximum number of bytes.
> +///
> +unsigned PPCInstrInfo::GetInstSize(const Mach...
2008 Apr 15
4
[LLVMdev] Being able to know the jitted code-size before emitting
OK, here's a new patch that adds the infrastructure and the
implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize.
Both functions are virtual functions defined in TargetInstrInfo.h.
For X86, I moved some commodity functions from X86CodeEmitter to
X86InstrInfo.
What do you think?
Nicolas
Evan Cheng wrote:
>
> I think both of these belong to TargetInstrInfo. And
2012 Apr 19
0
[LLVMdev] Target Dependent Hexagon Packetizer patch
...case Hexagon::JMP_GTUrrdnPt_ie_nv_V4:
>> + case Hexagon::JMP_GTUrrdnPnt_ie_nv_V4:
>> + case Hexagon::JMP_GTUrrdnNotPt_ie_nv_V4:
>> + case Hexagon::JMP_GTUrrdnNotPnt_ie_nv_V4:
>> +
>> + // V4 absolute set addressing.
>> + case Hexagon::LDrid_abs_setimm_V4:
>> + case Hexagon::LDriw_abs_setimm_V4:
>> + case Hexagon::LDrih_abs_setimm_V4:
>> + case Hexagon::LDrib_abs_setimm_V4:
>> + case Hexagon::LDriuh_abs_setimm_V4:
>> + case Hexagon::LDriub_abs_setimm_V4:
>> +
>> + case Hexagon::STrid_abs...