Displaying 11 results from an estimated 11 matches for "sequ".
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2009 Jul 10
2
How to number a subset consecutively from 1 to n?
Hello,
I have a data frame of the following form
block trial dv
1 1 10
1 1 11
1 1 9
1 2 12
1 2 9
1 3 12
1 3 13
1 3 14
1 3 15
1 4 12
1 4 11
1 4 10
1 4 9
1 4 11
and need to number the rows consecutively in the following manner
block trial dv sequ
1 1 10 1
1 1 11 2
1 1 9 3
1 2 12 1
1 2 9 2
1 3 12 1
1 3 13 2
1 3 14 3
1 3 15 4
1 4 12 1
1 4 11 2
1 4 10 3
1 4 9 4
1 4 11 5
Any idea how to solve this problem? I tried but did not succeed :-(
Best Jens B?lte
2007 Jan 22
1
Latin hyper cube sampling from expand.grid()
Dear R experts
I am looking for a package which gives me latin hyper cube samples
from the grid of values produced from the command "expand.grid". Any
pointers to this issue might be very useful. Basically, I am doing the
following:
> a<-(1:10)
> b<-(20:30)
> dataGrid<-expand.grid(a,b)
Now, is there a way to use this "dataGrid" in the package
2011 Oct 18
2
[LLVMdev] Fixing segmented stacks
On Oct 18, 2011, at 2:46 PM, Jakob Stoklund Olesen wrote:
>
> On Oct 18, 2011, at 2:33 PM, Sanjoy Das wrote:
>
>>> it should be expanded late: In lib/Target/X86/X86MCInstLower.cpp.
>>
>> This is exactly what I was missing. Thanks a ton! :)
>
> We have three pseudo expansion passes:
>
> 1. ExpandISelPseudos.cpp - For instructions that may need to
2011 Oct 23
0
[LLVMdev] Fixing segmented stacks
...y Duncan), which is lowered in
MCInstLower.
The second patch fixes a bug reported by -verify-machineinstrs.
Thanks!
--
Sanjoy Das
http://playingwithpointers.com
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2015 Aug 25
2
[LLVMdev] TableGen Register Class not matching for MI in 3.6
...rands can only map to GPR and not GPRBase, so I can't
>>> just replace GPR with GPRBase.
>>>
>>>
>>> You need to look at XXXRegisterInfo.td.
>>> You should have something like:
>>> def GPR : RegisterClass<"ARM", [i32], 32, (add (seque
>>>
>>> The list between square brackets are the type bound to this register
>>> class.
>>> You may want to bound i32 (or whatever) on GPRBase if that is not
>>> already the case.
>>>
>>>
>>>
>>> Thanks.
>>>...
2015 Aug 25
2
[LLVMdev] TableGen Register Class not matching for MI in 3.6
...R and not GPRBase, so I
>>>> can't just replace GPR with GPRBase.
>>>>
>>>>
>>>> You need to look at XXXRegisterInfo.td.
>>>> You should have something like:
>>>> def GPR : RegisterClass<"ARM", [i32], 32, (add (seque
>>>>
>>>> The list between square brackets are the type bound to this register
>>>> class.
>>>> You may want to bound i32 (or whatever) on GPRBase if that is not
>>>> already the case.
>>>>
>>>>
>>>>
&g...
2015 Aug 25
2
[LLVMdev] TableGen Register Class not matching for MI in 3.6
...>>>>> can't just replace GPR with GPRBase.
>>>>>
>>>>>
>>>>> You need to look at XXXRegisterInfo.td.
>>>>> You should have something like:
>>>>> def GPR : RegisterClass<"ARM", [i32], 32, (add (seque
>>>>>
>>>>> The list between square brackets are the type bound to this register
>>>>> class.
>>>>> You may want to bound i32 (or whatever) on GPRBase if that is not
>>>>> already the case.
>>>>>
>>>...
2015 Aug 25
2
[LLVMdev] TableGen Register Class not matching for MI in 3.6
...can't just replace GPR with GPRBase.
>>>>>>
>>>>>>
>>>>>> You need to look at XXXRegisterInfo.td.
>>>>>> You should have something like:
>>>>>> def GPR : RegisterClass<"ARM", [i32], 32, (add (seque
>>>>>>
>>>>>> The list between square brackets are the type bound to this register
>>>>>> class.
>>>>>> You may want to bound i32 (or whatever) on GPRBase if that is not
>>>>>> already the case.
>>>&...
2015 Aug 25
2
[LLVMdev] TableGen Register Class not matching for MI in 3.6
...ace GPR with GPRBase.
>>>>>>>
>>>>>>>
>>>>>>> You need to look at XXXRegisterInfo.td.
>>>>>>> You should have something like:
>>>>>>> def GPR : RegisterClass<"ARM", [i32], 32, (add (seque
>>>>>>>
>>>>>>> The list between square brackets are the type bound to this register
>>>>>>> class.
>>>>>>> You may want to bound i32 (or whatever) on GPRBase if that is not
>>>>>>> already the...
2015 Aug 25
4
[LLVMdev] TableGen Register Class not matching for MI in 3.6
Hi Ryan,
> On Aug 24, 2015, at 6:49 PM, Ryan Taylor <ryta1203 at gmail.com> wrote:
>
> Quentin,
>
> I apologize for the spamming here but in getVR (where VReg is assigned an RC), it calls:
>
> const TargetRegisterClass *RC = TLI->getRegClassFor(Op.getSimpleValueType());
> VReg = MRI->createVirtualRegister(RC);
>
> My question is why is it using the
2004 Mar 31
1
wine segfaults and crashes my 2.4.x kernel
kernel is downloaded with up2date:
[s2@katleriai s2]$ cat /etc/redhat-release && rpm -q glibc kernel && uname -r
Red Hat Linux release 8.0 (Psyche)
glibc-2.3.2-4.80.8
kernel-2.4.20-27.8
kernel-2.4.20-28.8
2.4.20-28.8
when i make wine to run setup.exe from WordViewer97, i am getting usual
installer's window with two buttons. after pressing "Continue" i am
getting