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...ug in your target. Why not custom lower the f32 > setcc nodes directly to the desired target nodes rather than doing > this two stage lowering? > > Evan > At the moment I'm not doing any custom lowering in my target - the lowering I was describing was what I observed the SectionDAG was doing. I was under the impression that LLVM's soft float support meant that if I didn't call addRegisterClass() with any FP types then floating point operations would be expanded into libcalls and it would all just work(tm). And for the most part it does work - addition, division, e...

...not custom lower the f32 >> setcc nodes directly to the desired target nodes rather than doing >> this two stage lowering? >> >> Evan >> > At the moment I'm not doing any custom lowering in my target - the > lowering I was describing was what I observed the SectionDAG was > doing. > I was under the impression that LLVM's soft float support meant that > if > I didn't call addRegisterClass() with any FP types then floating point > operations would be expanded into libcalls and it would all just > work(tm). And for the most part it doe...

...es directly to the desired target nodes rather than doing >>> this two stage lowering? >>> >>> Evan >>> >>> >> At the moment I'm not doing any custom lowering in my target - the >> lowering I was describing was what I observed the SectionDAG was >> doing. >> I was under the impression that LLVM's soft float support meant that >> if >> I didn't call addRegisterClass() with any FP types then floating point >> operations would be expanded into libcalls and it would all just >> work(tm). And...

...sired target nodes rather than doing >>>> this two stage lowering? >>>> >>>> Evan >>>> >>>> >>> At the moment I'm not doing any custom lowering in my target - the >>> lowering I was describing was what I observed the SectionDAG was >>> doing. >>> I was under the impression that LLVM's soft float support meant >>> that if >>> I didn't call addRegisterClass() with any FP types then floating >>> point >>> operations would be expanded into libcalls and it w...

On Jun 23, 2008, at 5:35 AM, Richard Osborne wrote: > I'm trying to write a backend for a target with no hardware floating > point support. I've added a single i32 register class. I'm wanting all > floating point operations to be lowered to library function calls. For > the most part LLVM seems to get this right. For example > > define double @div(double %a, double

I'm trying to write a backend for a target with no hardware floating point support. I've added a single i32 register class. I'm wanting all floating point operations to be lowered to library function calls. For the most part LLVM seems to get this right. For example define double @div(double %a, double %b) { %result = fdiv double %a, %b ret double %result } is expanded to a

...is two stage lowering? >>>>> >>>>> Evan >>>>> >>>>> >>>>> >>>> At the moment I'm not doing any custom lowering in my target - the >>>> lowering I was describing was what I observed the SectionDAG was >>>> doing. >>>> I was under the impression that LLVM's soft float support meant >>>> that if >>>> I didn't call addRegisterClass() with any FP types then floating >>>> point >>>> operations would be expande...