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Dear Raul, Instruction selection and instruction scheduling is, to the best of my knowledge, done at the MachineInstr (MI) IR level. The documentation you've read is on the target independent LLVM IR. You will probably need to read the documentation on LLVM's code generator. The documents on Writing an LLVM Backend, the LLVM Target Independent Code Generator, and Machine IR Format

Hello All, I would like your help to learn how to traverse an LLVM DAG and perform some analysis. I know that llc can be used to view a DAG, but I would like to manipulate them. In particular I'm interested in the instruction selection and the scheduling DAGs. I have read the documentation about writing an analysis pass and I know how to traverse a basic block on a LLVM IR assembly file, but