search for: savescavengerregist

You mean when I "explicity" use it by calling methods of register scavenger? Right now I'm just allocating virtual registers that will be resolved by the use of register scavenger and I'm also providing an override of the virtual method saveScavengerRegister. In Mips16, I have an extra mips 32 register (not usually very useful since it can only be used in a move instruction) I can use instead of having to go to the stack for an emergency slot. On 11/10/2012 04:39 PM, Arnold Schwaighofer wrote: > CC the list. > > On Sat, Nov 10, 2012 at 6:...

...register and there is no way to add another register or large constant to it. You have to move SP to a mips 16 register and then add the value of another register which has already been loaded with a large constant. So that means that two registers are needed. I'm wondering if my version of saveScavengerRegister uses say T0 and T1 (mips32 registers) for emergency spill slots will work. The usual inline code which goes to the emergency slot only allows for one emergency spill slot. But my routine would only fail if more than two emergency slots were needed but maybe other things would be messed up. I...

...ency slot again and not be able to. Instead it tries to restore it only right before register it is freeing up. Maybe I'm misunderstanding this code. // If the target knows how to save/restore the register, let it do so; // otherwise, use the emergency stack spill slot. if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { // Spill the scavenged register before I. assert(ScavengingFrameIndex >= 0 && "Cannot scavenge register without an emergency spill slot!"); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC,TRI);...

...com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp > > This looks late for a virtual register to appear. Where is this vreg made real? The register scavenger should take care of such emergency post-RA register allocation. For thumb1, this happens in Thumb1RegisterInfo::saveScavengerRegister(): http://llvm.org/docs/doxygen/html/structllvm_1_1Thumb1RegisterInfo.html#ac73131381e7f5533f8e1e601f8e1c9ca Cheers, Jon > > Thanks, > -steve > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc...

Hello LLVM, The ARM target sometimes adds an instruction with a virtual register in eliminateFrameIndex(): https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp This looks late for a virtual register to appear. Where is this vreg made real? Thanks, -steve

...b/Target/ARM/ARMBaseRegisterInfo.cpp >> >> This looks late for a virtual register to appear. Where is this vreg made >> real? > > The register scavenger should take care of such emergency post-RA register > allocation. For thumb1, this happens in > Thumb1RegisterInfo::saveScavengerRegister(): > http://llvm.org/docs/doxygen/html/structllvm_1_1Thumb1RegisterInfo.html#ac73131381e7f5533f8e1e601f8e1c9ca > > > Cheers, > > Jon >> >> >> Thanks, >> -steve >> _______________________________________________ >> LLVM Developers mailing list...

.... > > Instead it tries to restore it only right before register it is freeing up. > > Maybe I'm misunderstanding this code. > > // If the target knows how to save/restore the register, let it do so; > // otherwise, use the emergency stack spill slot. > if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { > // Spill the scavenged register before I. > assert(ScavengingFrameIndex >= 0 && > "Cannot scavenge register without an emergency spill slot!"); > TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrame...

CC the list. On Sat, Nov 10, 2012 at 6:30 PM, Arnold Schwaighofer <arnold.schwaighofer at gmail.com> wrote: > Assuming you use the scavenger in your own code yes. > > A usage could look like: > > for all basic blocks BB: > RS->enter(BB) > for all instructions CurrInst in block order: > if CurrInst has virtual def > CurrReg = RS->scavenge(CurrInst)

...;> This looks late for a virtual register to appear. Where is this > >> vreg made > >> real? > > > > The register scavenger should take care of such emergency post-RA > > register > > allocation. For thumb1, this happens in > > Thumb1RegisterInfo::saveScavengerRegister(): > > http://llvm.org/docs/doxygen/html/structllvm_1_1Thumb1RegisterInfo.html#ac73131381e7f5533f8e1e601f8e1c9ca > > > > > > Cheers, > > > > Jon > >> > >> > >> Thanks, > >> -steve > >> _______________________________...