Displaying 3 results from an estimated 3 matches for "rv32ic".
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rv32i
2017 Jul 11
8
[LLD] Linker Relaxation
Here's an example using the gcc toolchain for embedded 32 bit RISC-V (my
HiFive1 board):
#include <stdio.h>
int foo(int i){
if (i < 100){
printf("%d\n", i);
}
return i;
}
int main(){
foo(10);
return 0;
}
After compiling to a .o with -O2 -march=RV32IC we get (just looking at foo)
00000000 <foo>:
0: 1141 addi sp,sp,-16
2: c422 sw s0,8(sp)
4: c606 sw ra,12(sp)
6: 06300793 li a5,99
a: 842a mv s0,a0
c: 00a7cb63 blt a5,a0,22 <.L2>
10:...
2017 Jul 11
4
[LLD] Linker Relaxation
...;>
>> int foo(int i){
>> if (i < 100){
>> printf("%d\n", i);
>> }
>> return i;
>> }
>>
>> int main(){
>> foo(10);
>> return 0;
>> }
>>
>> After compiling to a .o with -O2 -march=RV32IC we get (just looking at
>> foo)
>>
>> 00000000 <foo>:
>> 0: 1141 addi sp,sp,-16
>> 2: c422 sw s0,8(sp)
>> 4: c606 sw ra,12(sp)
>> 6: 06300793 li a5,99
>> a: 842a...
2017 Jul 11
2
[LLD] Linker Relaxation
Hi,
Does lld support linker relaxation that may shrink code size? As far
as I see lld seems to assume that the content of input sections to be
fixed other than patching up relocations, but I believe some targets
may benefit the extra optimization opportunity with relaxation.
Specifically, I'm currently working on adding support for RISC-V in
lld, and RISC-V heavily relies on linker relaxation