search for: rrx

Hi, I just realized that clang produces Thumb-2 instruction in code even when older CPU type which doesn't suport Thumb-2 is specified. Here is output: # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c clang version 3.0 (http://llvm.org/git/clang.git 98138cdfdee05c0afbab2b209ce8cfe4a52474e1) Target: arm-unknown-freebsd Thread model: posix "/opt/llvm/bin/clang" -cc1 -triple armv5e-unknown-freebsd -S -disable-free -main-file-name rrx.c -mrelocation-model static -mdisable-fp-elim...

On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote: > # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c Even though you specified cpu as arm9, it's probably generating generic ARM IR (use -emit-llvm -S and see), which defaults to ARM instructions. If you want thumb, use triple = thumb-unknown-freebsd, but still, that will have problems. You can do it in two steps (clang -> IR, llc -&...

On Jun 22, 2011, at 3:16 PM, Renato Golin wrote: > On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote: >> # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c > > Even though you specified cpu as arm9, it's probably generating > generic ARM IR (use -emit-llvm -S and see), which defaults to ARM > instructions. > > If you want thumb, use triple = thumb-unknown-freebsd, but still, that > will have problems. You can do it i...

Hi > I just realized that clang produces Thumb-2 instruction in code even when older CPU type which doesn't suport Thumb-2 is specified. > > Here is output: > > # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c > clang version 3.0 (http://llvm.org/git/clang.git 98138cdfdee05c0afbab2b209ce8cfe4a52474e1) > Target: arm-unknown-freebsd > Thread model: posix >  "/opt/llvm/bin/clang" -cc1 -triple armv5e-unknown-freebsd It seems you're generating arm, not thumb code. -- With b...

...ow to handle yet. Some Makefile magic should be able to take care of issues of the sort encountered in #1 (don't pass -integrated-as when compiling .S files). Inline assembly is a bit trickier. Temporarily, if those files compile/assemble OK with the system assembler (i.e., don't have the rrx instruction mnemonic in them), we could work around by not using -integrated-as for them. That's pretty fugly, though, and would just be a quick workaround to allow you to keep making progress while the real issues get fixed. How much inline asm is there in that file that's causing issues?...

...quot;, " << getRegisterName(MO1.getReg()); > + << ", " << getRegisterName(MO1.getReg()) > + << ", " << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()));; > > if (ARM_AM::getSORegShOp(MO3.getImm()) == ARM_AM::rrx) > return; > > - O << ", "; > + O << " "; > > if (MO2.getReg()) { > O << getRegisterName(MO2.getReg()); Does your assembler support the other shift mnemonics (e.g., "LSL")? This will change the output for...

...- << ", " << getRegisterName(MO1.getReg()); + << ", " << getRegisterName(MO1.getReg()) + << ", " << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()));; if (ARM_AM::getSORegShOp(MO3.getImm()) == ARM_AM::rrx) return; - O << ", "; + O << " "; if (MO2.getReg()) { O << getRegisterName(MO2.getReg());

...64-bit architecture? For example, the following instruction converts a double to a single. The source operand is a register of class "Pair64". Is there a way to define it such that the register class is defined at runtime when we know if it should be a 64-bit register class? def FD2S_rr: RRX<0b00110,0,0,0, (outs Core32:$a), (ins Pair64:$b), "FD2S\t$a,$b"),[(set f32:$a, (fpround f64:$b))]>; Example register classes: def Core32: RegisterClass<"XYZ", [i32,f32], 32, (add R0,R1,R2,R3,... def Pair64: RegisterClass<"XYZ",...

...t; > Some Makefile magic should be able to take care of issues of the sort encountered in #1 (don't pass -integrated-as when compiling .S files). > > Inline assembly is a bit trickier. Temporarily, if those files compile/assemble OK with the system assembler (i.e., don't have the rrx instruction mnemonic in them), we could work around by not using -integrated-as for them. That's pretty fugly, though, and would just be a quick workaround to allow you to keep making progress while the real issues get fixed. > > How much inline asm is there in that file that's causi...

On Jun 22, 2011, at 9:00 AM, Renato Golin wrote: > On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >>> This sounds like a dead end as newer binutils are GPLv3. >> >> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then.

On Jun 22, 2011, at 7:27 PM, Jim Grosbach wrote: >> I will try to find those pre-v3 patches. >> >> In meantime I wrote a patch which changes to old mnemonics for shift instructions. >> This fixes compiling on the freebsd. > > If this is really the only issue you're seeing, we may be lucky and your binutils already have support for lots of the changes necessary

Hi Everyone; First, is my understanding correct that all boxes with agents >3.0 will need to have hiera installed? I have gotten conflicting answers and I have found different answers in the documentation as well. Can anyone clear this up for me? And, if it is needed.. has anyone gotten it working on AIX? Thanks! Bee -- You received this message because you are subscribed to the Google

On Jun 23, 2011, at 12:01 AM, Jim Grosbach wrote: > > On Jun 22, 2011, at 2:08 PM, Renato Golin wrote: > >> On 22 June 2011 19:18, Anton Korobeynikov <anton at korobeynikov.info> wrote: >>> Unfortunately, you have to live with this. Until recently binutils >>> were quite buggy wrt thumb2 code, so, most probably you will need new >>> binutils in

On Jun 22, 2011, at 2:08 PM, Renato Golin wrote: > On 22 June 2011 19:18, Anton Korobeynikov <anton at korobeynikov.info> wrote: >> Unfortunately, you have to live with this. Until recently binutils >> were quite buggy wrt thumb2 code, so, most probably you will need new >> binutils in any case. > > Hi Anton, > > It's not so simple. GPL3 can be quite a

...lvm/MC/MCInst.h" #include "llvm/Target/TargetRegistry.h" -#include "llvm/Target/TargetAsmParser.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/SourceMgr.h" #include "llvm/ADT/OwningPtr.h" @@ -35,18 +35,9 @@ enum ShiftType { Rrx }; -class ARMAsmParser : public TargetAsmParser { - MCAsmParser &Parser; +class ARMAsmParser : public MachOAsmParser { private: - MCAsmParser &getParser() const { return Parser; } - - MCAsmLexer &getLexer() const { return Parser.getLexer(); } - - void Warning(SMLoc L, const Tw...

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