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Hi, Very few inline assembly are supported for the X86 backend. As I see from X86ISelLowering.cpp, only bswap, rorw, xchgl and simple register selections (e.g. {=r10}) LLVM JIT can recoginze. But for PPC backend, I am not sure why PPC JIT see all inline assembly IRs as an error. Ding-Yong On Thu, Mar 24, 2011 at 2:53 PM, Duncan Sands <baldrick at free.fr> wrote: > Hi 陳韋任, > > > It seems PP...

...call wrchr jmp wrstr_l wrstr_d: push %si ret crlf: call wrstr .ascii "\r\n\0" ret ASCII_MARKER1 "hx" wrhexn: and $0x0F, %al cmpb $10, %al jae .alph addb $'0, %al jmp .wc .alph: addb $('A - 10), %al .wc: call wrchr ret wrhexb: movb %dl, %al pushw %ax rorw $4, %ax call wrhexn popw %ax call wrhexn ret wrhexw: rorw $8, %dx call wrhexb rorw $8, %dx call wrhexb ret ASCII_MARKER1 "HE" wrhexbses: pushw %di popw %si wrhexbses_l: movb $' , %al call wrchr es lodsb movw %ax, %dx call wrhexb loop wrhexbses_l ret data: ASCII_...

Hi 陳韋任, > It seems PPC JIT does not recognize inline assembly. > For example, when I give LLVM IR belows to PPC JIT, > > %0 = tail call i32* asm "", "={r10}"() nounwind ;<i32*> [#uses=1] > > it complaints that inline assembly is not a supported > instruction. x86 JIT works fine, however. I'm surprised this worked with the x86 JIT - I

Hi, all It seems PPC JIT does not recognize inline assembly. For example, when I give LLVM IR belows to PPC JIT, %0 = tail call i32* asm "", "={r10}"() nounwind ; <i32*> [#uses=1] it complaints that inline assembly is not a supported instruction. x86 JIT works fine, however. Is there a reason that makes PPC JIT not support inline assembly? Currently, we

...his that just don't lend themselves to abstraction. I'd vote for an "asm" instruction that just passes literal text through to the back end. Let the user ensure its for the right hardware, etc. For example: asm " movl 4(%esp), %eax andl $0xffff, %eax rorw $8, %ax ret" The danger here is that the feature gets over used and subverts optimization. Still, for the things that need it, it would be the right thing. > > > > > The reason I'm asking is that I'd like as much code as possible to be > > open to...

Suppose I wanted to, say, write glibc for LLVM (fat chance! :) I would need at some point to write (hopefully a small amount) of native code to, say, access specific registers, handle interrupts, or generate operating system traps. From my (somewhat cursory) review of AsmParser, it seems like this can't be done with LLVM right now. There is nothing in AsmParser or the rest of LLVM that would