Displaying 20 results from an estimated 41 matches for "rorl".
2007 Apr 18
1
[PATCH 5/14] i386 / Use early clobber to eliminate rotate in desc
Use an early clobber on addr to avoid the extra rorl instruction at the
end of _set_tssldt_desc.
Also, get some C type checking on the descriptor struct here.
Patch-base: 2.6.13-rc5-mm1
Patch-keys: i386 desc cleanup optimize
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.13/include/asm-i386/desc.h
===========================...
2007 Apr 18
1
[PATCH 5/14] i386 / Use early clobber to eliminate rotate in desc
Use an early clobber on addr to avoid the extra rorl instruction at the
end of _set_tssldt_desc.
Also, get some C type checking on the descriptor struct here.
Patch-base: 2.6.13-rc5-mm1
Patch-keys: i386 desc cleanup optimize
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.13/include/asm-i386/desc.h
===========================...
2007 Apr 18
0
[PATCH 6/12] early-clobber-tss
Use an early clobber on addr to avoid the extra rorl instruction at the
end of _set_tssldt_desc.
Also, get some C type checking on the descriptor struct here.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.13/include/asm-i386/desc.h
===================================================================
--- linux-2.6.13.orig/inc...
2007 Apr 18
0
[PATCH 9/12] base-into-desc
...8 18:01:31.000000000 -0700
@@ -29,40 +29,6 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(desc,base) do { \
- unsigned long __tmp; \
- typecheck(struct desc_struct *, desc); \
- asm volatile("movw %w5,%2\n\t" \
- "rorl $16,%5\n\t" \
- "movb %b5,%3\n\t" \
- "movb %h5,%4" \
- :"=m"(*(desc)), \
- "=&q" (__tmp) \
- :"m" (*((char *)(desc)+2)), \
- "m" (*((char *)(desc)+4)), \
- &quo...
2007 Apr 18
0
[PATCH 6/12] early-clobber-tss
Use an early clobber on addr to avoid the extra rorl instruction at the
end of _set_tssldt_desc.
Also, get some C type checking on the descriptor struct here.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.13/include/asm-i386/desc.h
===================================================================
--- linux-2.6.13.orig/inc...
2007 Apr 18
0
[PATCH 9/12] base-into-desc
...8 18:01:31.000000000 -0700
@@ -29,40 +29,6 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(desc,base) do { \
- unsigned long __tmp; \
- typecheck(struct desc_struct *, desc); \
- asm volatile("movw %w5,%2\n\t" \
- "rorl $16,%5\n\t" \
- "movb %b5,%3\n\t" \
- "movb %h5,%4" \
- :"=m"(*(desc)), \
- "=&q" (__tmp) \
- :"m" (*((char *)(desc)+2)), \
- "m" (*((char *)(desc)+4)), \
- &quo...
2007 Apr 18
0
[PATCH 10/14] i386 / Move descriptor accessors into desc h
...9 20:17:27.000000000 -0700
@@ -29,40 +29,6 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(desc,base) do { \
- unsigned long __tmp; \
- typecheck(struct desc_struct *, desc); \
- asm volatile("movw %w5,%2\n\t" \
- "rorl $16,%5\n\t" \
- "movb %b5,%3\n\t" \
- "movb %h5,%4" \
- :"=m"(*(desc)), \
- "=&q" (__tmp) \
- :"m" (*((char *)(desc)+2)), \
- "m" (*((char *)(desc)+4)), \
- &quo...
2007 Apr 18
0
[PATCH 10/14] i386 / Move descriptor accessors into desc h
...9 20:17:27.000000000 -0700
@@ -29,40 +29,6 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(desc,base) do { \
- unsigned long __tmp; \
- typecheck(struct desc_struct *, desc); \
- asm volatile("movw %w5,%2\n\t" \
- "rorl $16,%5\n\t" \
- "movb %b5,%3\n\t" \
- "movb %h5,%4" \
- :"=m"(*(desc)), \
- "=&q" (__tmp) \
- :"m" (*((char *)(desc)+2)), \
- "m" (*((char *)(desc)+4)), \
- &quo...
2007 Apr 18
0
[PATCH 8/12] base-limit-cleanup
...0 -0700
+++ linux-2.6.13/include/asm-i386/system.h 2005-08-08 20:47:32.000000000 -0700
@@ -29,49 +29,39 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(addr,base) do { unsigned long __pr; \
-__asm__ __volatile__ ("movw %%dx,%1\n\t" \
- "rorl $16,%%edx\n\t" \
- "movb %%dl,%2\n\t" \
- "movb %%dh,%3" \
- :"=&d" (__pr) \
- :"m" (*((addr)+2)), \
- "m" (*((addr)+4)), \
- "m" (*((addr)+7)), \
- "0" (base) \
- ); } while(0)
-
-#define _set_limit(add...
2007 Apr 18
0
[PATCH 8/12] base-limit-cleanup
...0 -0700
+++ linux-2.6.13/include/asm-i386/system.h 2005-08-08 20:47:32.000000000 -0700
@@ -29,49 +29,39 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(addr,base) do { unsigned long __pr; \
-__asm__ __volatile__ ("movw %%dx,%1\n\t" \
- "rorl $16,%%edx\n\t" \
- "movb %%dl,%2\n\t" \
- "movb %%dh,%3" \
- :"=&d" (__pr) \
- :"m" (*((addr)+2)), \
- "m" (*((addr)+4)), \
- "m" (*((addr)+7)), \
- "0" (base) \
- ); } while(0)
-
-#define _set_limit(add...
2007 Apr 18
0
[PATCH 9/14] i386 / Typecheck and optimize base and limit accessors
...0 -0700
+++ linux-2.6.13/include/asm-i386/system.h 2005-08-10 20:41:03.000000000 -0700
@@ -29,49 +29,39 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(addr,base) do { unsigned long __pr; \
-__asm__ __volatile__ ("movw %%dx,%1\n\t" \
- "rorl $16,%%edx\n\t" \
- "movb %%dl,%2\n\t" \
- "movb %%dh,%3" \
- :"=&d" (__pr) \
- :"m" (*((addr)+2)), \
- "m" (*((addr)+4)), \
- "m" (*((addr)+7)), \
- "0" (base) \
- ); } while(0)
-
-#define _set_limit(add...
2007 Apr 18
0
[PATCH 9/14] i386 / Typecheck and optimize base and limit accessors
...0 -0700
+++ linux-2.6.13/include/asm-i386/system.h 2005-08-10 20:41:03.000000000 -0700
@@ -29,49 +29,39 @@
"2" (prev), "d" (next)); \
} while (0)
-#define _set_base(addr,base) do { unsigned long __pr; \
-__asm__ __volatile__ ("movw %%dx,%1\n\t" \
- "rorl $16,%%edx\n\t" \
- "movb %%dl,%2\n\t" \
- "movb %%dh,%3" \
- :"=&d" (__pr) \
- :"m" (*((addr)+2)), \
- "m" (*((addr)+4)), \
- "m" (*((addr)+7)), \
- "0" (base) \
- ); } while(0)
-
-#define _set_limit(add...
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
...must cast descriptors to (char *) for the inline assembler
to work properly caused me no end of grief working on these patches.
Note that GCC does not generate rotations to utilize %{a-d}h portions of
registers. This is pointless on P4 cores, since %{a-d}h issues a shift u-op
internally, and the rorl + (implicit shift) is no faster than issuing
two shift operations.
Getting rid of the trickiness allows GCC to get better register allocation
and generate more compact code (and shorter code if constant base and
limit do not require transformations). Compactness is all that is required;
none of t...
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
...must cast descriptors to (char *) for the inline assembler
to work properly caused me no end of grief working on these patches.
Note that GCC does not generate rotations to utilize %{a-d}h portions of
registers. This is pointless on P4 cores, since %{a-d}h issues a shift u-op
internally, and the rorl + (implicit shift) is no faster than issuing
two shift operations.
Getting rid of the trickiness allows GCC to get better register allocation
and generate more compact code (and shorter code if constant base and
limit do not require transformations). Compactness is all that is required;
none of t...
2012 Jul 29
0
[LLVMdev] rotate
...y output of:
======
.section __TEXT,__text,regular,pure_instructions
.globl _rotr
_rotr: ## @rotr
.cfi_startproc
## BB#0:
pushq %rbp
Ltmp2:
.cfi_def_cfa_offset 16
Ltmp3:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Ltmp4:
.cfi_def_cfa_register %rbp
movb %sil, %cl
rorl %cl, %edi <==== Rotate instruction
movl %edi, %eax
popq %rbp
ret
.cfi_endproc
.subsections_via_symbols
======
I hope this helps.
Michael
On Jul 28, 2012, at 8:29 PM, reed kotler <rkotler at mips.com> wrote:
> in C or C++, how can I get clang/llvm to...
2012 Jul 29
2
[LLVMdev] rotate
in C or C++, how can I get clang/llvm to try and do a "rotate".
(want to test this code in the mips16 port)
i.e. emit rotr node.
tia.
reed
2012 Jul 29
3
[LLVMdev] rotate
...> .globl _rotr
> _rotr: ## @rotr
> .cfi_startproc
> ## BB#0:
> pushq %rbp
> Ltmp2:
> .cfi_def_cfa_offset 16
> Ltmp3:
> .cfi_offset %rbp, -16
> movq %rsp, %rbp
> Ltmp4:
> .cfi_def_cfa_register %rbp
> movb %sil, %cl
> rorl %cl, %edi<==== Rotate instruction
> movl %edi, %eax
> popq %rbp
> ret
> .cfi_endproc
> .subsections_via_symbols
> ======
>
> I hope this helps.
>
> Michael
>
> On Jul 28, 2012, at 8:29 PM, reed kotler<rkotler at mips.com> wrote:
>
>> in C o...
2004 Sep 11
0
[LLVMdev] POST MORTEM: llvm-test changes
...'alloca'.
===================== SingleSource/Benchmarks/Shootout-C++/Output/echo
Fails with:
/usr/include/machine/endian.h: In function `__uint32_t __bswap32(__uint32_t)':
/usr/include/machine/endian.h:156: error: LLVM does not yet support inline assembly! Code: 'xchgb %h0, %b0
rorl $16, %0
xchgb %h0, %b0'
gmake[3]: [Output/echo.ll] Error 1 (ignored)
I guess I have to place a modified version of this header file in sys-include.
===================== SingleSource/Benchmarks/Misc/Output/pi
All of cbe/jit/llc fail with:
2c2
< x = 0.150572 y = 0.49 lo...
2007 Apr 18
0
[PATCH 5/12] desc-cleanup
...ss will get unless we need
@@ -52,7 +52,7 @@
extern void set_intr_gate(unsigned int irq, void * addr);
#define _set_tssldt_desc(n,addr,limit,type) \
-__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
+asm volatile ("movw %w3,0(%2)\n\t" \
"movw %w1,2(%2)\n\t" \
"rorl $16,%1\n\t" \
"movb %b1,4(%2)\n\t" \
2007 Apr 18
0
[PATCH 5/12] desc-cleanup
...ss will get unless we need
@@ -52,7 +52,7 @@
extern void set_intr_gate(unsigned int irq, void * addr);
#define _set_tssldt_desc(n,addr,limit,type) \
-__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
+asm volatile ("movw %w3,0(%2)\n\t" \
"movw %w1,2(%2)\n\t" \
"rorl $16,%1\n\t" \
"movb %b1,4(%2)\n\t" \