search for: rlavaee

Thank you very much John. With an environment variable I need to take some special care, but it looks like the only way to go. On Sun, Mar 30, 2014 at 11:07 AM, John Criswell <criswell at illinois.edu>wrote: > Dear Rahman, > > I think your best option is to modify the code in libLTO so that it runs > your pass when you want it to run. I believe the file you want to modify

Hi, I am trying to test if disabling function (entry) alignment has any effect on performance. On my x86 machine, all functions seem to get aligned to 16-bytes. I know that GCC provides a flag (-fno-align-functions) to disable function alignment. However, I could not find the similar flag for clang. According to the following quote from LLVM doc, clang delegates the job to the target in case no

Thanks John, The reason I want to do this is that register allocator works only on SSA form, and if you instrument regallocated code with non-regallocated machine instructions, then you cannot regallocate the result. A workaround is to assign physical registers while doing the instrumentation, which I don't think is as easy as the above. On Tue, Sep 23, 2014 at 11:01 AM, John Criswell

I'm getting some odd behavior out of MBP and was hoping someone knowledge of the code might be able to give some guidance. Fair warning, I'm trying to describe a problem in code I don't really understand, so if something doesn't make sense, assume I misunderstood something. The problematic case I'm seeing is that cold blocks are being placed between the preheader and

Hi, I'm wondering how I can convert "register allocated" code back to SSA form. I realized from MachineRegisterInfo.h that a function leaves SSA form only once and cannot be taken back to it. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140923/0124addd/attachment.html>

Hi, I am finding it difficult to see how I can run an IR instrumentation pass after "all" IR passes. I previously used opt to run my pass after linking all the llvm bitcode files and then ran llc. I found out that llc runs some other Function passes which depend on the target. For example, tail calls are only supported in x86 under some circumstances. Then I tried lto and link time

Hi, I have written a code layout feedback directed optimization pass, which currently works for basic block reordering and function reordering. It very effectively improves the speedup (we could improve Python by 30%). The profiling method is window based context sensitive which is based on reference affinity (