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On Jan 12, 2015, at 2:45 PM, Rafael Espíndola <rafael.espindola at gmail.com> wrote: > On 10 January 2015 at 17:43, Rahman Lavaee <r.lavaee at gmail.com> wrote: >> Hi, >> I'm building LLVM on Mac OS 10.10 and I'm having trouble making LTO work. >> The system linker dumps the following information when I executed "ld -v" >> >> @(#)PROGRAM:ld PROJECT:ld64-241.9 >> co...

...ructions, then you cannot regallocate the result. A workaround is to assign physical registers while doing the instrumentation, which I don't think is as easy as the above. On Tue, Sep 23, 2014 at 11:01 AM, John Criswell <jtcriswel at gmail.com> wrote: > On 9/23/14, 10:52 AM, Rahman Lavaee wrote: > >> Hi, >> >> I'm wondering how I can convert "register allocated" code back to SSA >> form. I realized from MachineRegisterInfo.h that a function leaves SSA form >> only once and cannot be taken back to it. >> > > Are you wanting t...

Hi, I'm building LLVM on Mac OS 10.10 and I'm having trouble making LTO work. The system linker dumps the following information when I executed "ld -v" @(#)PROGRAM:ld PROJECT:ld64-241.9 configured to support archs: armv6 armv7 armv7s arm64 i386 x86_64 x86_64h armv6m armv7m armv7em LTO support using: LLVM version 3.4.2 which tells me that it is correctly pointing to the LLVM

...(it is either in llc or in > some LLVM library somewhere). The only reason I discourage the llc route > is because it is difficult to get whole-program bitcode files for large > programs (e.g., Apache). > > Regards, > > John Criswell > > > On 3/29/14, 12:47 AM, Rahman Lavaee wrote: > > Hi, > I am finding it difficult to see how I can run an IR instrumentation pass > after "all" IR passes. > I previously used opt to run my pass after linking all the llvm bitcode > files and then ran llc. > I found out that llc runs some other Function...

Hi, I am trying to test if disabling function (entry) alignment has any effect on performance. On my x86 machine, all functions seem to get aligned to 16-bytes. I know that GCC provides a flag (-fno-align-functions) to disable function alignment. However, I could not find the similar flag for clang. According to the following quote from LLVM doc, clang delegates the job to the target in case no

Hi, I'm wondering how I can convert "register allocated" code back to SSA form. I realized from MachineRegisterInfo.h that a function leaves SSA form only once and cannot be taken back to it. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140923/0124addd/attachment.html>

...; Yes, having a specific ELF section type would be great. Though I am clueless about how this change will be received given that the ".stack_sizes" section also uses SHT_PROGBITS. I can definitely look into it if I get some assurance. James > > On Wed, 16 Sep 2020 at 22:00, Rahman Lavaee <rahmanl at google.com> wrote: > >> Hi All, >> >> Following up on >> https://lists.llvm.org/pipermail/llvm-dev/2020-July/143512.html, and >> https://reviews.llvm.org/D85408, we would like to consider a design >> which allows external tools to read the st...

I am trying to use CloneFunction to clone every IR function in a program, give the cloned versions a prefix and call the clones from the original functions (redirect the calls). Surprisingly, I see that after the LTO optimizations, the number of machine basic blocks in the two functions differ in some cases. Is this reasonable at all, given that the two functions must be exactly the same in the

Hi, I am finding it difficult to see how I can run an IR instrumentation pass after "all" IR passes. I previously used opt to run my pass after linking all the llvm bitcode files and then ran llc. I found out that llc runs some other Function passes which depend on the target. For example, tail calls are only supported in x86 under some circumstances. Then I tried lto and link time

Hi All, Following up on https://lists.llvm.org/pipermail/llvm-dev/2020-July/143512.html, and https://reviews.llvm.org/D85408, we would like to consider a design which allows external tools to read the structured contents of the .bb_addr_map section with library calls into an LLVM library. At the same time, we need to have tools/obj2yaml tests in place for bb_addr_map. So it sounds like the

Hi, I have written a code layout feedback directed optimization pass, which currently works for basic block reordering and function reordering. It very effectively improves the speedup (we could improve Python by 30%). The profiling method is window based context sensitive which is based on reference affinity (

>Exceptions >All eh pads are grouped together regardless of their coldness and are part of the original function. There are outstanding issues with splitting eh pads if they reside in separate sections in the binary. This remains as part of future work. Can you elaborate more on the outstanding issues with splitting eh pads? From my dip into the unwind map in gcc_except_table the

...scribing each of the inlined // callees. Each record contains: // INLINE SITE // GUID of the inlinee (uint64) // Line number | Discriminator (ULEB128) // FUNCTION BODY // A FUNCTION BODY entry describing the inlined function. From: Rahman Lavaee <rahmanl at google.com> Date: Saturday, August 8, 2020 at 1:09 PM To: Hongtao Yu <hoy at fb.com> Cc: Wei Mi <wmi at google.com>, Wenlei He <wenlei at fb.com>, Xinliang David Li <davidxl at google.com>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.o...

I'm getting some odd behavior out of MBP and was hoping someone knowledge of the code might be able to give some guidance. Fair warning, I'm trying to describe a problem in code I don't really understand, so if something doesn't make sense, assume I misunderstood something. The problematic case I'm seeing is that cold blocks are being placed between the preheader and

...imizer. Therefore we are building a persisting probe for each block that live through massive machine-independent/machine-dependent transforms. Besides probing basic blocks, a probe can be used to probe each value site of interest. So far only direct/indirect call sites are supported. From: Rahman Lavaee <rahmanl at google.com> Date: Saturday, August 8, 2020 at 9:44 AM To: Wenlei He <wenlei at fb.com> Cc: Hongtao Yu <hoy at fb.com>, Wei Mi <wmi at google.com>, Xinliang David Li <davidxl at google.com>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.o...

See my answers inline. From: Xinliang David Li <davidxl at google.com> Date: Friday, August 7, 2020 at 7:57 PM To: Wenlei He <wenlei at fb.com> Cc: "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, Wei Mi <wmi at google.com>, Hongtao Yu <hoy at fb.com> Subject: Re: [RFC] Context-sensitive Sample PGO with Pseudo-Instrumentation On Fri, Aug 7,