search for: retcc

...tch we would like to submit. Thanks in advance, Kostis Sagonas (for the ErLLVM team) > 0001: > | Implemented a new calling convention (cc 11) for HiPE similar to GHC's cc 10. > | In detail: > | * Inserted new symbol "cc 11" (CallingConv::HiPE). > | * Created cc and retcc for both 32 and 64 bit. > | * HiPE cc defines no calleE-save registers. > | * HiPE cc supports tail call optimization. > > 0002: > | Hack fix for GR32_TC registers. > | Add EBX, EDI to GR32_TC register class to handle a "ran out of registers during > | register allocatio...

...rt the LLVM backend for HiPE compiler, as described in a previous email. The corresponding commit messages are: 0001: | Implemented a new calling convention (cc 11) for HiPE similar to GHC's cc 10. | In detail: | * Inserted new symbol "cc 11" (CallingConv::HiPE). | * Created cc and retcc for both 32 and 64 bit. | * HiPE cc defines no calleE-save registers. | * HiPE cc supports tail call optimization. 0002: | Hack fix for GR32_TC registers. | Add EBX, EDI to GR32_TC register class to handle a "ran out of registers during | register allocation" in case of tailcall exista...

...tch we would like to submit. Thanks in advance, Kostis Sagonas (for the ErLLVM team) > 0001: > | Implemented a new calling convention (cc 11) for HiPE similar to GHC's cc 10. > | In detail: > | * Inserted new symbol "cc 11" (CallingConv::HiPE). > | * Created cc and retcc for both 32 and 64 bit. > | * HiPE cc defines no calleE-save registers. > | * HiPE cc supports tail call optimization. > > 0002: > | Hack fix for GR32_TC registers. > | Add EBX, EDI to GR32_TC register class to handle a "ran out of registers during > | register allocatio...

...eturn in XMM0 register. Currently LLVM handles v2f32 using MMX register MM0. i wonder what changes do i need to do in LLVM to support that change; manipulating v2f32 (float2) using XMM and not MMX ? one place i identifies where a change needs to be done is X86CallingConv.td where it define CC and RetCC . Thanks _________________________________________________________________ Hotmail: Trusted email with powerful SPAM protection. http://clk.atdmt.com/GBL/go/177141665/direct/01/ -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/p...

Hi, Following Chris' advice, I will rebase the patches and break them in 3 distinct emails (one at a time) in order to be easier for a reviewer to approve/comments. Please note that the three patches while being code-wise independent, they 're strongly-connected *semantically*, meaning that including just a subset of these patches to LLVM's code base is quite weak if the others are

Hi, We 've been working on an LLVM backend for High Performance Erlang (HiPE) [1], the native code compiler of Erlang/OTP [2]. ErLLVM [3] targets the X86 and AMD64 architectures for now but there is some ongoing work from a team on the Uppsala University to also support ARM. In our implementation, we have paid special attention on retaining ABI-compatibility with the Erlang Runtime System in