search for: reset_control_deassert

...>; reset-names = "module", "client"; }; ... }; }; The PMC driver could then grab the "module" and "client" resets and do something like this: reset_control_assert(powergate->rst_client); reset_control_assert(powergate->rst_module); reset_control_deassert(powergate->rst_module); reset_control_deassert(powergate->rst_client); Optionally the above could be extended with a reset_control_status()- loop. Alternatively reset_control_assert() would block until the FLUSH_DONE bit is set. Stephen, Peter, any thoughts on the above? Thierry ---------...

...t;; > }; > > ... > }; > }; > > The PMC driver could then grab the "module" and "client" resets and do > something like this: > > reset_control_assert(powergate->rst_client); > reset_control_assert(powergate->rst_module); > reset_control_deassert(powergate->rst_module); > reset_control_deassert(powergate->rst_client); > > Optionally the above could be extended with a reset_control_status()- > loop. Alternatively reset_control_assert() would block until the > FLUSH_DONE bit is set. > I think the reset_control_asse...

...sert(tdev->rst); udelay(10); - ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); - if (ret) - goto err_clamp; - udelay(10); + if (!tdev->pdev->dev.pm_domain) { + ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); + if (ret) + goto err_clamp; + udelay(10); + } reset_control_deassert(tdev->rst); udelay(10); -- 2.13.0

...lt;linux/regulator/consumer.h> > #include <soc/tegra/fuse.h> > +#include <soc/tegra/mc.h> > #include <soc/tegra/pmc.h> > > #include "nouveau_drm.h" > @@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) > reset_control_deassert(gpu->rst); > udelay(10); > > + tegra_mc_flush(gpu->mc, gpu->swgroup, false); > + udelay(10); > + > return 0; > > err_clamp: > @@ -77,6 +82,14 @@ static int nouveau_platform_power_down(struct nouveau_platform_gpu *gpu) > { > int err; > >...

...t; #include <soc/tegra/fuse.h> > >>+#include <soc/tegra/mc.h> > >> #include <soc/tegra/pmc.h> > >> #include "nouveau_drm.h" > >>@@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) > >> reset_control_deassert(gpu->rst); > >> udelay(10); > >>+ tegra_mc_flush(gpu->mc, gpu->swgroup, false); > >>+ udelay(10); > >>+ > >> return 0; > >> err_clamp: > >>@@ -77,6 +82,14 @@ static int nouveau_platform_power_down(struct nouveau_platform_g...

...t; >>>>+#include <soc/tegra/mc.h> > >>>> #include <soc/tegra/pmc.h> > >>>> #include "nouveau_drm.h" > >>>>@@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) > >>>> reset_control_deassert(gpu->rst); > >>>> udelay(10); > >>>>+ tegra_mc_flush(gpu->mc, gpu->swgroup, false); > >>>>+ udelay(10); > >>>>+ > >>>> return 0; > >>>> err_clamp: > >>>>@@ -77,6 +82,14 @@ static i...

...;soc/tegra/mc.h> > >>>>>> #include <soc/tegra/pmc.h> > >>>>>> #include "nouveau_drm.h" > >>>>>>@@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) > >>>>>> reset_control_deassert(gpu->rst); > >>>>>> udelay(10); > >>>>>>+ tegra_mc_flush(gpu->mc, gpu->swgroup, false); > >>>>>>+ udelay(10); > >>>>>>+ > >>>>>> return 0; > >>>>>> err_clamp:...

...gate_remove_clamping(TEGRA_POWERGATE_3D); > - if (ret) > - goto err_clamp; > - udelay(10); > + if (!tdev->pdev->dev.pm_domain) { > + ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); > + if (ret) > + goto err_clamp; > + udelay(10); > + } > > reset_control_deassert(tdev->rst); > udelay(10); > -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: OpenPGP digital signature URL: <https://lists.freedesktop.org/archives/nouveau/attachments/20170613/a9b...

...e <linux/reset.h> #include <linux/regulator/consumer.h> #include <soc/tegra/fuse.h> +#include <soc/tegra/mc.h> #include <soc/tegra/pmc.h> #include "nouveau_drm.h" @@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) reset_control_deassert(gpu->rst); udelay(10); + tegra_mc_flush(gpu->mc, gpu->swgroup, false); + udelay(10); + return 0; err_clamp: @@ -77,6 +82,14 @@ static int nouveau_platform_power_down(struct nouveau_platform_gpu *gpu) { int err; + tegra_mc_flush(gpu->mc, gpu->swgroup, true); + udelay(10)...

...>> #include <soc/tegra/fuse.h> >> +#include <soc/tegra/mc.h> >> #include <soc/tegra/pmc.h> >> >> #include "nouveau_drm.h" >> @@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) >> reset_control_deassert(gpu->rst); >> udelay(10); >> >> + tegra_mc_flush(gpu->mc, gpu->swgroup, false); >> + udelay(10); >> + >> return 0; >> >> err_clamp: >> @@ -77,6 +82,14 @@ static int nouveau_platform_power_down(struct nouveau_platform_gpu *...

.../tegra/fuse.h> >>>> +#include <soc/tegra/mc.h> >>>> #include <soc/tegra/pmc.h> >>>> #include "nouveau_drm.h" >>>> @@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) >>>> reset_control_deassert(gpu->rst); >>>> udelay(10); >>>> + tegra_mc_flush(gpu->mc, gpu->swgroup, false); >>>> + udelay(10); >>>> + >>>> return 0; >>>> err_clamp: >>>> @@ -77,6 +82,14 @@ static int nouveau_platform_power_do...

...t; +#include <soc/tegra/mc.h> >>>>>> #include <soc/tegra/pmc.h> >>>>>> #include "nouveau_drm.h" >>>>>> @@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) >>>>>> reset_control_deassert(gpu->rst); >>>>>> udelay(10); >>>>>> + tegra_mc_flush(gpu->mc, gpu->swgroup, false); >>>>>> + udelay(10); >>>>>> + >>>>>> return 0; >>>>>> err_clamp: >>>>>>...

Hi, This series includes some pieces of fixes to complete the GK20A power on/off sequences and add the suspend/resume support. The patches 1/11 - 4/11 are based on the linux-next-20141219. The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's tree (http://cgit.freedesktop.org/~darktama/nouveau). Thanks, Vince Vince Hsu (4): (linux-next-20141219) ARM:

...> > >>>>>> #include <soc/tegra/pmc.h> > > >>>>>> #include "nouveau_drm.h" > > >>>>>>@@ -61,6 +63,9 @@ static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) > > >>>>>> reset_control_deassert(gpu->rst); > > >>>>>> udelay(10); > > >>>>>>+ tegra_mc_flush(gpu->mc, gpu->swgroup, false); > > >>>>>>+ udelay(10); > > >>>>>>+ > > >>>>>> return 0; > > >&gt...

...+ err = clk_prepare_enable(gpu->clk_pwr); + if (err) + goto err_clk_pwr; + clk_set_rate(gpu->clk_pwr, 204000000); + udelay(10); + + reset_control_assert(gpu->rst); + udelay(10); + + err = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); + if (err) + goto err_clamp; + udelay(10); + + reset_control_deassert(gpu->rst); + udelay(10); + + return 0; + +err_clamp: + clk_disable_unprepare(gpu->clk_pwr); +err_clk_pwr: + clk_disable_unprepare(gpu->clk); +err_clk: + regulator_disable(gpu->vdd); +err_power: + return err; +} + +static int nouveau_platform_power_down(struct nouveau_platform_gpu *gpu)...

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. This version is mostly identical to v2 but fixes an important issue: the drvdata must be set to the drm_device for sysfs to work, so the platform device structure now includes the

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. Thanks to the input received for v1, this version is more self-contained and shares less stuff between nouveau_drm and nouveau_platform. The major change is that nouveau_platform is now

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

...goto err_clk_pwr; > + clk_set_rate(gpu->clk_pwr, 204000000); > + udelay(10); > + > + reset_control_assert(gpu->rst); > + udelay(10); > + > + err = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); > + if (err) > + goto err_clamp; > + udelay(10); > + > + reset_control_deassert(gpu->rst); > + udelay(10); > + > + return 0; > + > +err_clamp: > + clk_disable_unprepare(gpu->clk_pwr); > +err_clk_pwr: > + clk_disable_unprepare(gpu->clk); > +err_clk: > + regulator_disable(gpu->vdd); > +err_power: > + return err; > +} > + >...

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the