search for: regpairs

> On Jan 19, 2012, at 5:31 AM, Jonas Paulsson wrote: > LLVM would have to be extended with an RegClass/register-attribute 'spillable' > > > What exactly are you proposing? Why can't you do what the PowerPC and Hexagon targets do? Yes, I can move a CR to a GPR and save it to the stack, but due to a very irregular register file this is about 10 times more expensive

On Jan 20, 2012, at 6:40 AM, Jonas Paulsson wrote: > > What exactly are you proposing? Why can't you do what the PowerPC and Hexagon targets do? > > Yes, I can move a CR to a GPR and save it to the stack, but due to a very irregular register file this is about 10 times more expensive than saving/restoring an ordinary register. These registers should basically never > have to

On Jan 19, 2012, at 5:31 AM, Jonas Paulsson wrote: > LLVM would have to be extended with an RegClass/register-attribute 'spillable' What exactly are you proposing? Why can't you do what the PowerPC and Hexagon targets do? Spill-free register allocation sounds great, why not do it for all register classes? > , and a register allocator would have to implement register pairing.

...to make the PEI pass save/restore only one half of a register pair if the other half is not being used, instead of saving the whole pair. Here is an example of what I try to explain to make things more clear: Suppose this situation where we have a register file of 8bit regs, and that you can form regpairs by joining two adjacent regs. Pairs are pseudo regs that are formed by two 8 bit subregisters, with their lo and hi parts defined in the register.td file. Both 8 and 16bit types are legal. In the following function: char foo(char a, char b, char c, int d) Arguments are passed this way: a=R10, b=R8,...

...he PEI pass save/restore only one half of a register pair if the other half is not being used, instead of saving the whole pair. Here is an example of what I try to explain to make things more clear: > > Suppose this situation where we have a register file of 8bit regs, and that you can form regpairs by joining two adjacent regs. Pairs are pseudo regs that are formed by two 8 bit subregisters, with their lo and hi parts defined in the register.td file. Both 8 and 16bit types are legal. > In the following function: char foo(char a, char b, char c, int d) > Arguments are passed this way: a=...

Hi, My target has special requirements during register allocation - there is both a need to handle register pairing and to never spill a flag result reg-class (which might happen at -O0 for no obvious reason). Since neither of these issues seems to be supported, I have tried to pre-allocate these registers in the preRA pass. This has resulted in "using undefined physical register"

Hello, I have the AR9285 wireless adaptor on an HP DV6-2128ca notebook. I can see it. it comes up in NetworkManager but never gets an IP. the router is a linksys using WPA/PSK security. Would/could someone please help me out trying to get this to work? Output of several commands follows: dmesg: ath: EEPROM regdomain: 0x69 ath: EEPROM indicates we should expect a direct regpair map ath:

Does LLVM support register aliases between classes that are not in a sub/super class relationship? Cameron

On Thu, Oct 27, 2011 at 9:29 AM, Johannes Birgmeier <e0902998 at student.tuwien.ac.at> wrote: > >> Hi Johannes, what processor are you targeting?  Is it little-endian or >> big-endian? > Little-endian. (The truth: you can set it manually, but it is set to > little endian, for sure.) The processor is a TI TMS320C64x. > > Follow-up: I discovered that the

> This is contradictory: on a little-endian processor, the address for > loading a 64-bit value is same as the address of the low word. Are > you sure you're modeling the semantics of your lddw and stddw > instructions correctly? ... I thought so until now. Because I implemented stdw (store doubleword) completely analogous to lddw: Just print out stdw with the given pointer and

> Hi Johannes, what processor are you targeting? Is it little-endian or > big-endian? Little-endian. (The truth: you can set it manually, but it is set to little endian, for sure.) The processor is a TI TMS320C64x. Follow-up: I discovered that the "guilty" method is DAGCombiner::ReduceLoadWidth. The error is introduced because the offset is not calculated correctly. The first

Hi there, with the latest snapshot of linus tree, i see a stack trace and my system does not start X! Maybe someone finds this useful! (3.11 is working like a charm) BUG: unable to handle kernel NULL pointer dereference at (null) IP: [< (null)>] (null) PGD 24eaa0067 PUD 24e7ac067 PMD 0 Oops: 0010 [#1] PREEMPT SMP Modules linked in: bnep snd_hda_codec_hdmi

well after recently talking about how i haven''t had any problems with btrfs on several machines for ~1.5yrs... it happens :-( ) 2.6.35 kernel ) btrfs on partition 2 of sda ) no special mkfs or mount options used (except ssd) my fiancé''s EEE S101 netbook, w/SSD, is failing hard. when booting normally (subvol=__active), no special boot options, it hangs at udev... it all

Package: xen-hypervisor-4.1-amd64 Version: 4.1.4-3+deb7u1 Severity: normal Hello, I was running Xen for a few years and after a PSU failure I never got the system working stable again. I suspected damage to the board so I replaced everything in the system piece by piece but Xen enabled kernel always crashes even with only Dom0 running when moderate amount of IO happens on the box. kvm seems