Displaying 3 results from an estimated 3 matches for "reg16394".
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reg16384
2010 Jul 28
3
[LLVMdev] Subregister coalescing
...Ts. Then we select those to INSERT_SUBREG, everything
fine to that point.
Status before live analisys is (non-related instrs removed):
36 %reg16388<def> = LDWr %reg16384, 0; mem:LD4[<unknown>]
68 %reg16392<def> = INSERT_SUBREG %reg16392<undef>, %reg16388<kill>, 1
76 %reg16394<def> = LDWr %reg16386<kill>, 0; mem:LD4[<unknown>]
116 %reg16400<def> = MOVEV %reg16392<kill>
124 %reg16400<def> = INSERT_SUBREG %reg16400, %reg16394<kill>, 2
132 %reg16401<def> = LDWr %reg16390<kill>, 0; mem:LD4[<unknown>]
164 %reg16404&l...
2010 Nov 08
2
[LLVMdev] [LLVMDev] Register Allocation and copy instructions
...dStack-1] GR32:%reg16391
%reg16384<def> = COPY %reg16391:sub_16bit<kill>; GR16:%reg16384
GR32:%reg16391
Successors according to CFG: BB#1
BB#1: derived from LLVM BB %bb
Predecessors according to CFG: BB#0 BB#1
%reg16386<def> = PHI %reg16385, <BB#0>, %reg16394, <BB#1>;
GR16:%reg16386,16385,16394
%reg16387<def> = PHI %reg16384, <BB#0>, %reg16398, <BB#1>;
GR16:%reg16387,16384,16398
%reg16393<def> = MOV16ri 1; GR16:%reg16393
%reg16398<def> = COPY %reg16387; GR16:%reg16398,16387
%reg16398<...
2010 Jul 28
0
[LLVMdev] Subregister coalescing
On Jul 28, 2010, at 12:25 PM, Carlos Sánchez de La Lama wrote:
> Which after register coalescing gets transformed into:
>
> 36 %reg16404:1<def> = LDWr %reg16384, 0; mem:LD4[<unknown>]
> 76 %reg16394<def> = LDWr %reg16386<kill>, 0; mem:LD4[<unknown>]
> 124 %reg16404<def> = INSERT_SUBREG %reg16404, %reg16394<kill>, 2
> 132 %reg16401<def> = LDWr %reg16390<kill>, 0; mem:LD4[<unknown>]
> 172 %reg16404<def> = INSERT_SUBREG %reg16404, %re...