Displaying 3 results from an estimated 3 matches for "reg1080".
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reg1030
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
...%reg1077 = LW 0, <fi#8>
ADJCALLSTACKDOWN 0, %SP<imp-def>, %SP<imp-use>
%reg1078 = ADDiu %reg1076, <ga:.str>
%4 = ADDu %ZERO, %reg1078
%5 = ADDu %ZERO, %reg1077
JAL <ga:printf>
ADJCALLSTACKUP 0, %SP<imp-def>, %SP<imp-use>
%reg1079 = ADDu %ZERO, %2
%reg1080 = ADDiu %ZERO, 0
SW %reg1080, 0, <fi#4>
SW %reg1080, 0, <fi#2>
Successors according to CFG: 0x88c81d0 (#17)
Total amount of phi nodes to update: 0
Lowered selection DAG:
SelectionDAG has 6 nodes:
0x88c9060: ch = EntryToken
0x88cae40: i32 = FrameIndex <2>
0x88c9d...
2010 Jun 17
0
[LLVMdev] Loopinfo Analysis
Hi Hisham,
Most likely the basic blocks are the headers of two different loops. Try running viewCFG() on the function in question to see if this is the case.
Tom
----- Original Message -----
From: "Hisham Chowdhury" <hisham_chow at yahoo.com>
To: llvmdev at cs.uiuc.edu
Sent: Wednesday, June 16, 2010 7:22:00 PM GMT -05:00 US/Canada Eastern
Subject: [LLVMdev] Loopinfo Analysis
2010 Jun 16
2
[LLVMdev] Loopinfo Analysis
Hello,
I have a question regrading the analysis pass that generates loop info from an .ll code. My previous understanding was there will be just one loop header(in the loop info) for a particular loop. But, when i use isLoopHeader() member function from the loop info class I get 'true' return value for two different basic blocks. Note both basic blocks are loop conditional block(break