Displaying 4 results from an estimated 4 matches for "reg1074".
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reg1024
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
...: 0x88cb450: ch = SW 0x88cb218, 0x88cb380, 0x88cb3e8, 0x88cb4a8:1
SU(3): 0x88cae50: ch = BNE 0x88cb4a8, 0x88caeb8, 0x88c9dc8, 0x88cb450
Selected machine code:
bb55: 0x88c8550, LLVM BB @0x88bef08, ID#15:
Predecessors according to CFG: 0x88c7e48 (#3) 0x88c84c0 (#14)
%reg1073 = ADDiu %ZERO, 0
%reg1074 = LW 0, <fi#5>
%reg1075 = ADDiu %reg1074, 4294967295
SW %reg1075, 0, <fi#5>
BNE %reg1074, %reg1073, mbb<bb,0x88c7ed8>
Successors according to CFG: 0x88c7ed8 (#4) 0x88c85e0 (#16)
Total amount of phi nodes to update: 0
Replacing.1 0x88cb468: i32,ch = load 0x88cb3d0, 0x88cb36...
2009 Mar 25
2
[LLVMdev] Register allocation of stack slots
...s one single) registers when allocating stack slots to registers. This happens only to function locals (allocas) - allocation for e.g. function arguments passed by the stack work fine.
For example, the debug output of the initialization of several stack slots is the following:
1 : entry:
2 : %reg1074<def> = movC 0
3 : Store: store <fi#18>, 0, %R0<kill>
4 : Remembering SS#18 in physreg R0
5 : store <fi#18>, 0, %R0<kill>
6 : Reusing SS#18 from physreg R0 for vreg1075 instead of reloading into physreg R0
7 : store <fi#9>, 0, %R0, Mem:ST(2,2) [sig5...
2009 Mar 25
0
[LLVMdev] Register allocation of stack slots
...stack slots to
> registers. This happens only to function locals (allocas) -
> allocation for e.g. function arguments passed by the stack work fine.
> For example, the debug output of the initialization of several stack
> slots is the following:
>
> 1 : entry:
> 2 : %reg1074<def> = movC 0
> 3 : Store: store <fi#18>, 0, %R0<kill>
> 4 : Remembering SS#18 in physreg R0
> 5 : store <fi#18>, 0, %R0<kill>
> 6 : Reusing SS#18 from physreg R0 for vreg1075 instead of reloading
> into physreg R0
> 7 : store <fi#...
2004 Jun 22
3
[LLVMdev] Linearscan allocator bug?
...65a90>
%reg1032 = move %reg1033
%reg1034 = move 1
setcc %reg1025, %reg1034
if v< goto %disp(label shortcirc_next.0.selectcont.selecttrue)
%reg1075 = move 0
goto %disp(label shortcirc_next.0.selectcont.selectcont)
shortcirc_next.0.selectcont.selecttrue (0x8065bb0, LLVM BB @0x8063db0):
%reg1074 = move 1
shortcirc_next.0.selectcont.selectcont (0x8065c10, LLVM BB @0x8063d08):
%reg1036 = phi %reg1074, mbb<shortcirc_next.0.selectcont.selecttrue,0x8065bb0>, %reg1075, mbb<shortcirc_next.0.selectcont,0x8065b50>
%reg1035 = move %reg1036
%reg1037 = move 0
setcc %reg1033, %reg1037...