Displaying 4 results from an estimated 4 matches for "reg1056".
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reg1026
2004 Jul 01
2
[LLVMdev] Problem with isMoveInstr
...trInfo class, and
the register allocator immediately started to crash, in:
#4 0x40e88787 in llvm::LiveIntervals::joinIntervals (this=0x80630b0)
at ../lib/CodeGen/LiveIntervals.cpp:493
493 assert(r2iA != r2iMap_.end());
The instruction it crashes is:
(gdb) p $4.dump()
%reg1056 = move %gr7
And gr7 is exactly the register which is looked up with
Reg2IntervalMap::iterator r2iA = r2iMap_.find(regA)
on line 492. I'm not sure the about the logic, but seems the code tries to map
register into live interval, and since the above gr7 is inserted by code
selector (it...
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
..., 0x88c9dd8
SU(3): 0x88ca940: ch = TokenFactor 0x88ca7d8:1, 0x88c9d60:1
SU(2): 0x88ca8d8: i32 = ADDu 0x88ca7d8, 0x88c9d60
SU(7): 0x88c9d08: ch = SW 0x88ca8d8, 0x88c9540, 0x88ca6a8, 0x88ca940
Selected machine code:
bb32: 0x88c8280, LLVM BB @0x88becf8, ID#10:
%reg1055 = LUi <ga:flags.2176>
%reg1056 = LW 0, <fi#7>
%reg1057 = ADDiu %reg1055, <ga:flags.2176>
%reg1058 = ADDiu %ZERO, 0
%reg1059 = ADDu %reg1057, %reg1056
SB %reg1058, 0, %reg1059
%reg1060 = LW 0, <fi#7>
%reg1061 = LW 0, <fi#6>
%reg1062 = ADDu %reg1060, %reg1061
SW %reg1062, 0, <fi#7>
Success...
2004 Jul 01
0
[LLVMdev] Problem with isMoveInstr
...ediately started to crash, in:
>
> #4 0x40e88787 in llvm::LiveIntervals::joinIntervals (this=0x80630b0)
> at ../lib/CodeGen/LiveIntervals.cpp:493
> 493 assert(r2iA != r2iMap_.end());
>
> The instruction it crashes is:
>
> (gdb) p $4.dump()
> %reg1056 = move %gr7
>
> And gr7 is exactly the register which is looked up with
>
> Reg2IntervalMap::iterator r2iA = r2iMap_.find(regA)
>
> on line 492. I'm not sure the about the logic, but seems the code tries to map
> register into live interval, and since the above gr7 i...
2004 Jun 22
3
[LLVMdev] Linearscan allocator bug?
...39
call <ga:printf>
%ar7 = - %ar7, 8
%reg1054 = move %gr7
return
shortcirc_done.1 (0x8065d90, LLVM BB @0x8060320):
%reg1060 = phi %reg1032, mbb<shortcirc_next.0.selectcont.selectcont,0x8065c10>
%reg1064 = phi %reg1035, mbb<shortcirc_next.0.selectcont.selectcont,0x8065c10>
%reg1056 = move <ga:.str_1>
%reg1055 = move %reg1056
%ar7 = + %ar7, 8
%reg1057 = - %ar7, 1
store %reg1057, %reg1055
%reg1058 = - %ar7, 2
store %reg1058, %reg1029
%reg1059 = - %ar7, 3
store %reg1059, %reg1060
%reg1061 = - %ar7, 4
%reg1062 = move 0
store %reg1061, %reg1062
%reg1063 = - %ar7,...