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...ers on the premesis. Some of out clients also do vpn between themselves (which our servers have to handle) and pptp dialins (which go to the infastructure servers and are routed appropriately) For example purposes I will describe one of our most problematic instalations. There are 4 sites: Kendal, Redhills, Westlakes and Workington. All bar Workington have one server and Workington has 2. Each server has a /24 network of client machines behind it and an IP address that is internal to that network. Our infastructure servers are 192.168.0.1 and 192.168.4.1 and every site starts a vpnd link to both of...

Hello, I'm working on a compiler based on LLVM for a SIMD architecture that supports instruction predication. We would like to implement branching on this architecture using predication. As you know the LLVM-IR doesn't support instruction predication, so I'm not exactly sure on what is the best way to implement it. We came up with some ways to do it in LLVM: - Do not add any

Hi, In X86MachObjectWriter::RecordX86Relocation I found the comment if (Target.isAbsolute()) { // constant // SymbolNum of 0 indicates the absolute section. // // FIXME: Currently, these are never generated (see code below). I cannot // find a case where they are actually emitted. Type = macho::RIT_Vanilla; } Is the FIXME still true? I've got some code that

We are currently doing something similar to your third option in Hexagon backend. But it is a VLIW so predication is not the only reason for that. Sergei --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Marcello

Hi, while using this function I noticed that Type::getScalarSizeInBits() is not marked as const even if inside its body it just uses only other "const" functions and types. This prevents the usage of the function through const pointers/references to Type without any apparent reason. I propose of marking the function as const. (attached is a patch that does so). Cheers, Marcello --

On Fri, Oct 19, 2012 at 04:38:29PM +0100, Marcello Maggioni wrote: > Hello, > I'm working on a compiler based on LLVM for a SIMD architecture that > supports instruction predication. We would like to implement > branching on this architecture using predication. > As you know the LLVM-IR doesn't support instruction predication, so > I'm not exactly sure on what is the

Hi there, I wondered whether anyone could give me any advice about counting assembly instructions when using MCJIT? For performance regression testing I would like to be able to count the number of instructions generated during the jit compilation of a given module. The Statistic class, as far as I understand, cannot collect this data per-module (per-ExecutionEngine/per-MCJIT), and there is

Hi Verena, Windows + MachO is likely to run into lots of problems once you start passing in non-trivial code. The relocation model is very tied to Darwin. I believe some folks doing JIT on Windows have had some success w/ ELF. Hopefully someone more familiar with the specifics of that will chime in. -Jim On Jun 29, 2012, at 8:58 AM, Verena Beckham <verena at codeplay.com> wrote: >

Can I assume we're talking about MCJIT since a file format and relocations are involved? Some changes are required in order to get MCJIT to generate ELF object files. Eli Bendersky submitted a patch some time ago to modify the target triple code to enable this, but after a bit of discussion there didn't seem to be a consensus for accepting this proposal. If you want to try it out, the

ActiveRecord supports composed_of for value objects which is fantastic but one thing that it doesn''t seem to support (or at least I am unable to find any documentation for) validation of the value objects. For example, given the following: class Message < ActiveRecord::Base composed_of :sender, :class_name => ''EmailAddress'' composed_of :recipient,

Hi Jim, Andrew, Thanks, I read the discussions about using ELF + MCJIT + Windows and was hoping MachO would work just as well. Since you don't need to modify LLVM to be able to output MachO this was my first choice. But are you saying MachO will not work as well as ELF? Thanks for the patch Andrew, that will have to be my plan B in this case. Verena On 29/06/2012 23:47, Kaylor, Andrew

I have an instruction that takes no operands, and produces two results, in two consecutive cycles. I tried both of the following to my Schedule.td file: InstrItinData<IIMyInstr, [InstrStage<2, [FuncU]>], [1, 2]>, InstrItinData<IIMyInstr, [InstrStage<1, [FuncU]>, InstrStage<1, [FuncU]>], [1, 2]>, From what I can see in examples, these say that the first

Hi, The LLVM lang ref (http://llvm.org/docs/LangRef.html#i_bitcast) notes that bitcast of vectors to vectors is OK, provided the vectors are of the same size. In attempting this on large vector types (e.g. 16xi64 -> 16xf64), I get assertions related to Extended Value Types when attempting to perform code generation, but no errors at the BC level. Is it simply unsupported to stray outwith

Hello, In our LLVM backend we needto output certain labels in the AsmPrinter in order to access certain data through those labels. These labels are related to BlockAddress objects (that come from above) and they should be put into a position that is related to the BasicBlock pointed by that BlockAddress. The problem I'm hitting is that if the BasicBlock that the BlockAddress points to

Hi, I wondered whether the AggressiveAntiDepBreaker can properly handle predicated instructions. At the end of PrescanInstruction the "DefIndices" array is updated with the destination register without checking whether the instruction is predicated. That shortens the live range: Later on, in HandleLastUse we check whether the register IsLive, which considers only

Hi all, I recently created a version of llvm/clang for an architecture with some odd properties: - front end side: -- char,short,int : 20 bits -- long, long long: 40 bits -- pointer: 20 bits On the backend side, I have hardware support for 20-bit registers (and load/stores). (So, I have support for 'i20' and 'i40', but 'i40' is lowered into operations on 'i20')

Hi, I'm getting an Instruction emitter crash when emitting an INLINEASM SDNode that is Glued to other nodes. The crash happens at line 808 of file llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp: const MCInstrDesc &MCID = TII->get(F->getMachineOpcode()); with the assertion: assert(isMachineOpcode() && "Not a MachineInstr opcode!"); I'm not a great expert

At the risk of being banned for posting the same question twice, I thought I''d try once more with a question for the title rather than a statement (on the basis that perhaps questions get answered and statements ignored ;-) ) ActiveRecord supports composed_of for value objects which is fantastic but one thing that it doesn''t seem to support (or at least I am unable to

Hi, Is it possible to add users/change passwords for users in samba without it being dependant on anything in the UNIX password file? For example I want to add a user to my samba password file without them existing in the UNIX password file. If anyone has any RTFM info they can kick me in it would be most appreciated :) Thanks -- Jamie Heckford Network Manager Trident Microsystems Ltd Tel:

We've begun a network migration project to migrate from an old and pretty broken NT 4.0 domain (Lots of settings are just wrong and we wanted to rename the domain at the same time) to a Windows 2003 based AD domain. One of the issues we need to resolve is that all our users' My Documents are mapped to their home share on a Samba server I've been pondering how I can easily get both