search for: read_sysreg64

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

...3..74ab046 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -89,7 +89,11 @@ static void ctxt_switch_from(struct vcpu *p) /* MMU */ p->arch.vbar = READ_SYSREG(VBAR_EL1); +#ifdef CONFIG_ARM_32 p->arch.ttbcr = READ_SYSREG(TCR_EL1); +#else + p->arch.ttbcr = READ_SYSREG64(TCR_EL1); +#endif p->arch.ttbr0 = READ_SYSREG64(TTBR0_EL1); p->arch.ttbr1 = READ_SYSREG64(TTBR1_EL1); if ( is_pv32_domain(p->domain) ) @@ -168,7 +172,11 @@ static void ctxt_switch_to(struct vcpu *n) /* MMU */ WRITE_SYSREG(n->arch.vbar, VBAR_EL1); +#if defined(...

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I

Since OMAP UART has a few distinct features than common 8250 UART, I re-implemented its driver rather than porting it based on ns16550.c. There are mainly two big differences between the implementations. First, OMAP UART introduces the concept of register access mode, which divides the register map into seperated space. Switching the access mode is then necessary when configuring it. Second, THRE