Displaying 20 results from an estimated 126 matches for "r32".
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2004 Dec 02
3
[LLVMdev] Adding xadd instruction to X86
Hi,
I'm trying to add the xadd instruction to the X86 back end.
xadd r/m32, r32
exchanges r/m32 and r32, and loads the sum into r/m32. I'm
interested in the case where the destination operand is a
memory location.
I've added the following entry to X86InstrInfo.td:
def XADD32mr : I<0x87, MRMDestMem,
(ops i32mem:$src1, R32:$src2),
&...
2016 Aug 30
2
Tablegen pattern matching question
Hi all,
I want to match addition with 16bit integers. So I define a pattern
fragment as follows:
def simm16 : PatLeaf<(imm), [{ return isInt<16>(N->getSExtValue()); }]>;
Now I am confused between
(add R32:$dst, simm16:$im) and
(add R32:$dst, (i32 simm16:$im)).
Do both of them match the same pattern? Are they equivalent? If not what is
the difference?
I am also confused as to how ValueTypes relate to SDNodes as I think we are
able to use both of them as nodes.
--
Regards
Pratik Bhatu
Dual Degree(B...
2009 Dec 28
2
Modified R Code
...R23
9 R13 R23
If instead of two rates, suppose there are three rates, I will have to modify my code as
data_label = expand.grid(c("R11", "R12", "R13"), c("R21", "R23", "R23"), c("R31", "R32", "R33"))
If I define say
n = no_of_rates # I will be taking this figure from some otehr csv file.
My PROBLEM = B is how do I write the above code pertaining to data_label in terms of 'n'.
## _______________________________________________________________________
I...
2004 May 06
4
asterisk-oh323, new version 0.6.1
Hello all,
This new version (0.6.1) of asterisk-oh323 fixes the "one-way audio"
problem of the previous release.
Download from the usual location:
http://www.inaccessnetworks.com/projects/asterisk-oh323
Regards,
Michael.
2005 Jul 25
1
[LLVMdev] How to partition registers into different RegisterClass?
...t; -Chris
Hope I understand you correctly:
def C0 : ConstFpReg<0, "c0">;
...
def C200 : ConstFpReg<199, "c200">;
def I0 : ConstIntReg<0, "i0">;
...
def I100 : ConstIntReg<100, "i100">;
def R0 : TempReg<0, "r0">;
def R32 : TempReg<31, "r32">;
def V0 : InputReg<0, "v0">;
..
def V10 : InputReg<9, "v10">;
def O0 : OutputReg<0, "o0">;
..
def O4 : OutputReg<4, "o4">;
def FloatingPointRC : RegisterClass<packed, 128,
[R0, R1, R2, .....
2006 May 15
1
[LLVMdev] Selection DAG and register classes
...to another, no matter what the class is. What's the best
way to describe the operands DAG?
If I just write
(ops GR:$src, GR:$dst)
this will cover 1/4 of all possible combinations, and writing 4 instructions
variants is troublesome. Is there any syntax that write something:
pseudo-class R32 = GR | AR;
(opts R32:$src, R32:$dst);
- Volodya
2016 Aug 12
2
Check if getElementPtr Operand
Hello,
consider the following IR code :
%count4 = getelementptr inbounds %struct.r32, %struct.r32* %cur.087, i64 0,
i32 4
How to check in the instruction, whether the operand is a structure or not
if(isa<GetElementPtrInst>(instruction))
{
GetElementPtrInst *getElementPtrInst=dyn_cast<GetElementPtrInst>(&instruction);
//check if getElemetPtrInst operands structure...
2004 Dec 02
0
[LLVMdev] Adding xadd instruction to X86
On Thu, 2 Dec 2004, Brent Monroe wrote:
> I'm trying to add the xadd instruction to the X86 back end.
> xadd r/m32, r32
> exchanges r/m32 and r32, and loads the sum into r/m32. I'm
> interested in the case where the destination operand is a
> memory location.
>
> I've added the following entry to X86InstrInfo.td:
> def XADD32mr : I<0x87, MRMDestMem,
> (ops i32mem:$sr...
2005 Aug 11
1
[LLVMdev] Define an instruction with many operands
...PrintMethod = "printManyOperands";
}
def MO : ManyOperands;
def FOOBAR: Instruction<(ops MO:$operands), "foobar {$operands}">;
(2) 'Collapse' all operands in .td file. Contrary to method (1), each
operand is explicitly specified.
def FOOBAR: Instruction<(ops R32:$src0, R16:$src1, ... ), "foobar
$src0, $src1, ...">;
The operand list could be very long.
--
Tzu-Chien Chiu,
3D Graphics Hardware Architect
<URL:http://www.csie.nctu.edu.tw/~jwchiu>
2014 Jan 27
0
[PATCH] nv30: don't overwrite blend color setting for r32/r16 float formats
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Untested. Happened to see this when I was reading this file (don't ask). I
can't imagine the current situation to be the intended one, based on this
code...
src/gallium/drivers/nouveau/nv30/nv30_state_validate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
2006 Jun 26
0
[klibc 25/43] ia64 support for klibc
...+// Setup a non-local goto.
+//
+// Description:
+//
+// SetJump stores the current register set in the area pointed to
+// by "save". It returns zero. Subsequent calls to "LongJump" will
+// restore the registers and return non-zero to the same location.
+//
+// On entry, r32 contains the pointer to the jmp_buffer
+//
+ .align 32
+ .global setjmp
+ .proc setjmp
+setjmp:
+ //
+ // Make sure buffer is aligned at 16byte boundary
+ //
+ add r10 = -0x10,r0 ;; // mask the lower 4 bits
+ and r32 = r32, r10;;
+ add r32 = 0x10, r32;; // move to...
2003 Jun 19
4
WinXP can`t log on Samba PDC
...S_LOWDELAY SO_RCVBUF=8192 SO_SNDBUF=8192
wins support = yes
workgroup = workgroup
[public]
path = /tmp
guest ok = yes
writeable = yes
EOF
I already made the changes on regedit in my WinXP box.
this is how vipw looks like:
gino:x:500:500::/home/gino:/bin/bash
R32$:x:1200:300:workstation:/dev/null:/bin/false
this vigr:
gino:x:500:
R32:x:1200:
workstation::300:
2004 Dec 03
2
[LLVMdev] Adding xadd instruction to X86
Chris Lattner wrote:
> On Thu, 2 Dec 2004, Brent Monroe wrote:
>
>>I'm trying to add the xadd instruction to the X86 back end.
>>xadd r/m32, r32
>>exchanges r/m32 and r32, and loads the sum into r/m32. I'm
>>interested in the case where the destination operand is a
>>memory location.
>>
>>I've added the following entry to X86InstrInfo.td:
>>def XADD32mr : I<0x87, MRMDestMem,
>>...
2013 Oct 15
1
randomForest: Numeric deviation between 32/64 Windows builds
...) for many projects and recently stumbled upon a problem when I wrote unit tests for one of my projects:
On Windows, there are small numeric deviations when using the 32- / 64-bit version of R, which doesn't seem to be a problem on Linux or Mac.
R64 on Windows produces the same results as R64/R32 on Linux or Mac:
> set.seed(131)
> importance(randomForest(Species ~ ., data=iris))
MeanDecreaseGini
Sepal.Length 9.452470
Sepal.Width 2.037092
Petal.Length 43.603071
Petal.Width 44.116904
R32 on Windows produces the following:
> set.seed(131...
2007 Aug 14
2
State Space Modelling
Hey all,
I am trying to work under a State Space form, but I didn't get the help
exactly.
Have anyone eles used this functions?
I was used to work with S-PLUS, but I have some codes I need to adpt.
Thanks alot,
Bernardo
[[alternative HTML version deleted]]
2013 May 14
2
puppet and custom nagios object variables
Nagios support "custom object variables" (http://nagios.sourceforge.net/docs/nagioscore/3/en/customobjectvars.html) buy prefixing them with an underscore:
define host{
host_name linuxserver
_mac_address 00:06:5B:A6:AD:AA
_rack_number R32
}
However, I can''t determine how to use these with puppet nagios resources. I''m assuming they aren''t supported, but I''m also hoping that I just missed it in the documentation. Is anyone creating custom nagios object variables with puppet?
Thanks for the help....
2005 Jul 23
0
[LLVMdev] How to partition registers into different RegisterClass?
On Sat, 23 Jul 2005, Tzu-Chien Chiu wrote:
> 2005/7/23, Chris Lattner <sabre at nondot.org>:
>> What does a 'read only' register mean? Is it a constant (e.g. returns
>> 1.0)? Otherwise, how can it be a useful value?
>
> Yes, it's a constant register.
>
> Because the instruction cannot contain an immediate value, a constant
> value may be stored in
2005 Jul 23
3
[LLVMdev] How to partition registers into different RegisterClass?
2005/7/23, Chris Lattner <sabre at nondot.org>:
>
> What does a 'read only' register mean? Is it a constant (e.g. returns
> 1.0)? Otherwise, how can it be a useful value?
Yes, it's a constant register.
Because the instruction cannot contain an immediate value, a constant
value may be stored in a constant register, and it's defined _before_
the program starts by
2012 Nov 15
1
[LLVMdev] potential mach_override/mach_override.c fix
...ug.cgi?id=55289#c29
Index: mach_override.c
===================================================================
--- mach_override.c (revision 167724)
+++ mach_override.c (working copy)
@@ -725,6 +725,8 @@
{ 0x2, {0xFF, 0x00}, {0x89, 0x00} }, //
mov r/m32,r32 or r/m16,r16
{ 0x3, {0xFF, 0xFF, 0xFF}, {0x49, 0x89, 0xF8} }, //
mov %rdi,%r8
{ 0x4, {0xFF, 0xFF, 0xFF, 0xFF}, {0x40, 0x0F, 0xBE, 0xCE} }, //
movsbl %sil,%ecx
+ { 0x7, {0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00},
+ {0x48, 0x8D, 0x05, 0x0...
2007 Apr 05
0
[LLVMdev] Reminder: NewNIghtlyTest.pl
...s the output with different locales):
Moved for versioning.
------------------------------------------------------------------------
r33 | jlaskey | 2006-08-01 00:59:18 +0400 (Втр, 01 Авг 2006) | 1 line
Moved for versioning.
------------------------------------------------------------------------
r32 | jlaskey | 2006-08-01 00:58:59 +0400 (Втр, 01 Авг 2006) | 1 line
Moved for versioning.
------------------------------------------------------------------------
r31 | jlaskey | 2006-08-01 00:58:54 +0400 (Втр, 01 Авг 2006) | 1 line
Moved for versioning.
--------------------------------------------...