Displaying 5 results from an estimated 5 matches for "r2iit".
2004 Jun 09
2
[LLVMdev] BranchInst problem
...re and after register
> allocation?
Attached.
> You might also try -regalloc=linearscan, as the default
> allocator is, uhhh, non-optimal.
Ehm.... I get this:
llc: LiveIntervals.cpp:166: virtual bool
llvm::LiveIntervals::runOnMachineFunction(llvm::MachineFunction&): Assertion
`r2iit != r2iMap_.end()' failed.
- Volodya
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Code after instruction selection
# Machine code for _Z3addii():
<fi #-2> is 4 bytes fixed at location [SP-20]
<fi #-1> is 4 bytes fixed at location [SP-16]
entry (0x8681458):
%reg1024 = load <fi#-1...
2004 Jun 09
0
[LLVMdev] BranchInst problem
...s they are used.
> > You might also try -regalloc=linearscan, as the default
> > allocator is, uhhh, non-optimal.
>
> Ehm.... I get this:
>
> llc: LiveIntervals.cpp:166: virtual bool
> llvm::LiveIntervals::runOnMachineFunction(llvm::MachineFunction&): Assertion
> `r2iit != r2iMap_.end()' failed.
Hrm, that's obviously really bad. Can you send me (offline) the output of
llc with the -debug option set and with this code before the assert:
std::cerr << "MI: " << i << " " << reg << " "; mii->du...
2004 Jun 09
2
[LLVMdev] BranchInst problem
...the
> blocks they are used.
Oh, I now understand why you say default allocator is not very efficient.
> > Ehm.... I get this:
> >
> > llc: LiveIntervals.cpp:166: virtual bool
> > llvm::LiveIntervals::runOnMachineFunction(llvm::MachineFunction&):
> > Assertion `r2iit != r2iMap_.end()' failed.
>
> Hrm, that's obviously really bad. Can you send me (offline) the output of
> llc with the -debug option set and with this code before the assert:
>
> std::cerr << "MI: " << i << " " << reg << &qu...
2004 Jun 09
0
[LLVMdev] BranchInst problem
On Wed, 9 Jun 2004, Vladimir Prus wrote:
> > I assume that the two unconditional gotos are just test code, right? If
> > not, the second one is dead.
>
> Yes, in the final form there will be "iflt" instruction before the first goto,
> making it conditional.
Ah, ok :)
> > > The code after "goto" is disturbing. It looks like spill code, but
2004 Jun 09
2
[LLVMdev] BranchInst problem
Chris Lattner wrote:
> On Tue, 8 Jun 2004, Vladimir Prus wrote:
> > While adding support for branch instructions in my backend, I run into a
> > trouble. The code to handle branches looks like:
> > The machine code after instruction selection is:
> >
> > entry (0x8681458):
> > %reg1024 = load <fi#-1>
> > %reg1025 = load