Displaying 4 results from an estimated 4 matches for "r152019".
2012 Mar 05
4
[LLVMdev] commit r152019 broke architectures with more than 255 registers
Our architecture(TCE) can have LOTS of registers.
It seems r152019 changed some register bookkeeping data structures to
8-bit. This broke support for architectures with >255 registers.
Please revert this change or make those register-related values at least
16 bits wide.
2012 Mar 05
0
[LLVMdev] commit r152019 broke architectures with more than 255 registers
On Mar 5, 2012, at 5:39 AM, Heikki Kultala wrote:
> Our architecture(TCE) can have LOTS of registers.
>
> It seems r152019 changed some register bookkeeping data structures to
> 8-bit. This broke support for architectures with >255 registers.
>
> Please revert this change or make those register-related values at least
> 16 bits wide.
I agree. We can limit the number of physregs to 64k, but no more....
2012 Mar 06
2
[LLVMdev] Recent changes to MCRegisterClass fields: uint8_t is too narrow
Hi all,
in r152019 (from ctopper), the number of available registers of any type in a machine description is decreased to 256 because it needs to be encoded in uint8_t now. I'm trying to support an experimental embedded architecture with more registers (out of tree), but now that becomes impossible. Anyone knows...
2012 Mar 06
0
[LLVMdev] Recent changes to MCRegisterClass fields: uint8_t is too narrow
I changed it to uint16_t in r152100. Is that enough for your architecture?
On Tue, Mar 6, 2012 at 12:24 AM, Bjorn De Sutter <
bjorn.desutter at elis.ugent.be> wrote:
> Hi all,
>
> in r152019 (from ctopper), the number of available registers of any type
> in a machine description is decreased to 256 because it needs to be encoded
> in uint8_t now. I'm trying to support an experimental embedded architecture
> with more registers (out of tree), but now that becomes impossible...