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On Tue, Apr 28, 2020 at 05:16:41PM +0200, Joerg Roedel wrote: > @@ -480,6 +500,22 @@ SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) > SYM_DATA(phys_base, .quad 0x0) > EXPORT_SYMBOL(phys_base) > > +/* Boot GDT used when kernel addresses are not mapped yet */ > +SYM_DATA_LOCAL(boot_gdt_descr, .word boot_gdt_end - boot_gdt) >

On Tue, Apr 28, 2020 at 05:16:41PM +0200, Joerg Roedel wrote: > @@ -480,6 +500,22 @@ SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) > SYM_DATA(phys_base, .quad 0x0) > EXPORT_SYMBOL(phys_base) > > +/* Boot GDT used when kernel addresses are not mapped yet */ > +SYM_DATA_LOCAL(boot_gdt_descr, .word boot_gdt_end - boot_gdt) >

OK, here it is. Benchmarks still coming. This is against Andi's 2.6.18-rc7-git3 tree, and replaces the patches between (and not including) i386-pda-asm-offsets and i386-early-fault. One patch is identical, one is mildly modified, the rest are re-implemented but inspired by Jeremy's PDA work. Thanks, Rusty. -- Help! Save Australia from the worst of the DMCA: http://linux.org.au/law

OK, here it is. Benchmarks still coming. This is against Andi's 2.6.18-rc7-git3 tree, and replaces the patches between (and not including) i386-pda-asm-offsets and i386-early-fault. One patch is identical, one is mildly modified, the rest are re-implemented but inspired by Jeremy's PDA work. Thanks, Rusty. -- Help! Save Australia from the worst of the DMCA: http://linux.org.au/law

With LLVM 2.7, I see very inefficient emitting of zeros in .s files: test_: # @test_ .quad 0 # 0x0 .quad 0 # 0x0 .quad 0 # 0x0 .quad 0 # 0x0 .quad 0 # 0x0 .quad 0 # 0x0 [...] .quad 4 # 0x4 .quad 4

Hi all, I'm confused, in digium website, it says: TDM2400P: It supports a combination of up to 6 FXS and/or FXO modules for a total of 24 lines. 6 plus 6 is 12, how come it's 24? if I have 24 PSTN lines, i'll be needing 24 FXOs. Pls. elaborate. thanks. Lito -------------- next part -------------- An HTML attachment was scrubbed... URL:

I was wondering if (2) quad T1 cards will work nicely in 1 server with a quad core AMD 3.0 gig cpu? Basically used to dial out and deliver messages. play wav files for the message. Any thoughts. Jerry

I'm booting the default kernel on a dual quad core Xeon machine. I only see four CPUs and I expect to see 8. Do I have to build a custom kernel? Is there a switch or configuration parameter I need to set? Thanks, Jerry -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi All, If the target supports quad-register R0:R1:R2:R3 (Rn is 32-bit register), is it possible mapping quad-register to v4i32 so that the following example work? typedef int v4si __attribute__ ((vector_size (16))); void foo(v4si i) { v4si j = i; } I don't know how to write CallingConv.td to represent the concept of occupying quad-register R0:R1:R2:R3 once seeing

Hi people, Do you have pointers to web documents that help me make comparisons between buying a server with two quad core 2.33 ghz or buying a 4 dual core 2ghz server? I am trying to answer a question of performance. It is not important the redundancy/failover or the price of the server. Just the performance. obviously all the hardware specs are the same, the question is the CPU. --

From: Joerg Roedel <jroedel at suse.de> Handling exceptions during boot requires a working GDT. The kernel GDT is not yet ready for use, so install a temporary boot GDT. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/kernel/head_64.S | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/x86/kernel/head_64.S

Hi, I am looking for dual or quad fast ethernet NICs that work with CentOS. There is no need for high performance so regular fast/pci is ok. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.centos.org/pipermail/centos/attachments/20101228/1f5e2944/attachment-0001.html>

On Mon, May 18, 2020 at 10:23:13AM +0200, Borislav Petkov wrote: > On Tue, Apr 28, 2020 at 05:16:41PM +0200, Joerg Roedel wrote: > > @@ -480,6 +500,22 @@ SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) > > SYM_DATA(phys_base, .quad 0x0) > > EXPORT_SYMBOL(phys_base) > > > > +/* Boot GDT used when kernel addresses are not mapped yet */ >

The one remaining caller of set_limit, the PnP BIOS code, calls into the PnP BIOS, passing kernel parameters in and out. These parameteres may be passed from arbitrary kernel virtual memory, so they deserve strict protection to stop a bad BIOS from smashing beyond the object size. Unfortunately, the use of set_limit was badly botching this by setting the limit in terms of pages, when it really

Hello, Someone can indicate some Ethernet device Quad 10/100 to use with CentOS 5.x? Thanks, -- Daniel Bruno http://danielbruno.eti.br

The one remaining caller of set_limit, the PnP BIOS code, calls into the PnP BIOS, passing kernel parameters in and out. These parameteres may be passed from arbitrary kernel virtual memory, so they deserve strict protection to stop a bad BIOS from smashing beyond the object size. Unfortunately, the use of set_limit was badly botching this by setting the limit in terms of pages, when it really

Hello All, I am trying to figure out which way to go for a quad port fxo solution with a good echo can on it. My options are the sangoma remora, a mediatrix fxo, or something similar. The issue is that I would need a good EC. This would be on about a 9000 foot loop, and the lines don't function well on a spa-3000 or zaptel tdm 4 port card. Anyone have experience that drives them in a

Hmm writing a blog post about TNTC is beyond the time I have right now. Here is some high level documentation of the layout of Heap objects in GHC: http://hackage.haskell.org/trac/ghc/wiki/Commentary/Rts/Storage/HeapObjects#InfoTables With TNTC enabled we generate code for closures of this form: .text .align 8 .long Main_main1_srt-(Main_main1_info)+0 .long 0 .quad 4294967299 .quad 0

Since APM BIOS segment limits are now fixed, set them in head.S GDT and don't use the complicated _set_limit() macro expansion. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.14-zach-work/arch/i386/kernel/head.S =================================================================== --- linux-2.6.14-zach-work.orig/arch/i386/kernel/head.S 2005-11-04 15:46:11.000000000 -0800

Since APM BIOS segment limits are now fixed, set them in head.S GDT and don't use the complicated _set_limit() macro expansion. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.14-zach-work/arch/i386/kernel/head.S =================================================================== --- linux-2.6.14-zach-work.orig/arch/i386/kernel/head.S 2005-11-04 15:46:11.000000000 -0800