Displaying 20 results from an estimated 1953 matches for "quad".
2020 May 18
2
[PATCH v3 31/75] x86/head/64: Install boot GDT
On Tue, Apr 28, 2020 at 05:16:41PM +0200, Joerg Roedel wrote:
> @@ -480,6 +500,22 @@ SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page))
> SYM_DATA(phys_base, .quad 0x0)
> EXPORT_SYMBOL(phys_base)
>
> +/* Boot GDT used when kernel addresses are not mapped yet */
> +SYM_DATA_LOCAL(boot_gdt_descr, .word boot_gdt_end - boot_gdt)
> +SYM_DATA_LOCAL(boot_gdt_base, .quad 0)
> +SYM_DATA_S...
2020 May 18
2
[PATCH v3 31/75] x86/head/64: Install boot GDT
On Tue, Apr 28, 2020 at 05:16:41PM +0200, Joerg Roedel wrote:
> @@ -480,6 +500,22 @@ SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page))
> SYM_DATA(phys_base, .quad 0x0)
> EXPORT_SYMBOL(phys_base)
>
> +/* Boot GDT used when kernel addresses are not mapped yet */
> +SYM_DATA_LOCAL(boot_gdt_descr, .word boot_gdt_end - boot_gdt)
> +SYM_DATA_LOCAL(boot_gdt_base, .quad 0)
> +SYM_DATA_S...
2007 Apr 18
1
[PATCH 0/7] Using %gs for per-cpu areas on x86
OK, here it is. Benchmarks still coming. This is against Andi's
2.6.18-rc7-git3 tree, and replaces the patches between (and not
including) i386-pda-asm-offsets and i386-early-fault.
One patch is identical, one is mildly modified, the rest are
re-implemented but inspired by Jeremy's PDA work.
Thanks,
Rusty.
--
Help! Save Australia from the worst of the DMCA: http://linux.org.au/law
2007 Apr 18
1
[PATCH 0/7] Using %gs for per-cpu areas on x86
OK, here it is. Benchmarks still coming. This is against Andi's
2.6.18-rc7-git3 tree, and replaces the patches between (and not
including) i386-pda-asm-offsets and i386-early-fault.
One patch is identical, one is mildly modified, the rest are
re-implemented but inspired by Jeremy's PDA work.
Thanks,
Rusty.
--
Help! Save Australia from the worst of the DMCA: http://linux.org.au/law
2010 Sep 17
2
[LLVMdev] Emitting .zero
With LLVM 2.7, I see very inefficient emitting of zeros in .s files:
test_: # @test_
.quad 0 # 0x0
.quad 0 # 0x0
.quad 0 # 0x0
.quad 0 # 0x0
.quad 0 # 0x0
.quad 0 # 0x0
[...]
.quad 4 # 0x4
.quad 4 #...
2006 Oct 16
7
tdm2400p question
Hi all,
I'm confused, in digium website, it says:
TDM2400P: It supports a combination of up to 6 FXS and/or FXO modules for a
total of 24 lines.
6 plus 6 is 12, how come it's 24?
if I have 24 PSTN lines, i'll be needing 24 FXOs.
Pls. elaborate.
thanks.
Lito
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2009 Jul 09
5
can 2 quad T1 cards work in 1 quad core amd server
I was wondering if (2) quad T1 cards
will work nicely in 1 server with a quad core AMD 3.0 gig cpu?
Basically used to dial out and deliver messages. play wav files for the
message.
Any thoughts.
Jerry
2007 Feb 26
2
CentOS 4.4 smp on Dual Quad Core Xeon
I'm booting the default kernel on a dual quad core Xeon machine. I only see four CPUs and I expect to see 8.
Do I have to build a custom kernel?
Is there a switch or configuration parameter I need to set?
Thanks,
Jerry
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2017 Sep 10
2
Question about quad-register
Hi All,
If the target supports quad-register R0:R1:R2:R3 (Rn is 32-bit
register), is it possible mapping quad-register
to v4i32 so that the following example work?
typedef int v4si __attribute__ ((vector_size (16)));
void foo(v4si i) {
v4si j = i;
}
I don't know how to write CallingConv.td to represent the co...
2007 Sep 01
4
OT: 4 dual cores agains 2 quad cores
Hi people,
Do you have pointers to web documents that help me make comparisons
between buying a server with two quad core 2.33 ghz or buying a 4 dual
core 2ghz server?
I am trying to answer a question of performance. It is not important
the redundancy/failover or the price of the server. Just the
performance.
obviously all the hardware specs are the same, the question is the CPU.
--
---------------------------...
2020 Apr 28
0
[PATCH v3 31/75] x86/head/64: Install boot GDT
...%eax, %es
+
+ /* Now switch to __KERNEL_CS so IRET works reliably */
+ pushq $__KERNEL_CS
+ leaq .Lon_kernel_cs(%rip), %rax
+ pushq %rax
+ lretq
+
+.Lon_kernel_cs:
+ UNWIND_HINT_EMPTY
+
/* Sanitize CPU configuration */
call verify_cpu
@@ -480,6 +500,22 @@ SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page))
SYM_DATA(phys_base, .quad 0x0)
EXPORT_SYMBOL(phys_base)
+/* Boot GDT used when kernel addresses are not mapped yet */
+SYM_DATA_LOCAL(boot_gdt_descr, .word boot_gdt_end - boot_gdt)
+SYM_DATA_LOCAL(boot_gdt_base, .quad 0)
+SYM_DATA_START(boot_gdt)
+ .quad 0
+ .quad...
2010 Dec 28
3
Dual or quad fast ethernet NICs (that work with CentOS)
Hi,
I am looking for dual or quad fast ethernet NICs that work with CentOS.
There is no need for high performance so regular fast/pci is ok.
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2020 Jun 04
0
[PATCH v3 31/75] x86/head/64: Install boot GDT
On Mon, May 18, 2020 at 10:23:13AM +0200, Borislav Petkov wrote:
> On Tue, Apr 28, 2020 at 05:16:41PM +0200, Joerg Roedel wrote:
> > @@ -480,6 +500,22 @@ SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page))
> > SYM_DATA(phys_base, .quad 0x0)
> > EXPORT_SYMBOL(phys_base)
> >
> > +/* Boot GDT used when kernel addresses are not mapped yet */
> > +SYM_DATA_LOCAL(boot_gdt_descr, .word boot_gdt_end - boot_gdt)
> > +SYM_DATA_LOCAL(boot_gdt_ba...
2007 Apr 18
0
[PATCH 5/21] i386 Pnp byte granularity
...head.S
===================================================================
--- linux-2.6.14-zach-work.orig/arch/i386/kernel/head.S 2005-11-04 16:55:01.000000000 -0800
+++ linux-2.6.14-zach-work/arch/i386/kernel/head.S 2005-11-05 00:28:12.000000000 -0800
@@ -504,12 +504,12 @@ ENTRY(cpu_gdt_table)
.quad 0x0000000000000000 /* 0x80 TSS descriptor */
.quad 0x0000000000000000 /* 0x88 LDT descriptor */
- /* Segments used for calling PnP BIOS */
- .quad 0x00c09a0000000000 /* 0x90 32-bit code */
- .quad 0x00809a0000000000 /* 0x98 16-bit code */
- .quad 0x0080920000000000 /* 0xa0 16-bit data */
- .qua...
2010 Aug 12
3
Ethernet Quad
Hello,
Someone can indicate some Ethernet device Quad 10/100 to use with CentOS 5.x?
Thanks,
--
Daniel Bruno
http://danielbruno.eti.br
2007 Apr 18
0
[PATCH 5/21] i386 Pnp byte granularity
...head.S
===================================================================
--- linux-2.6.14-zach-work.orig/arch/i386/kernel/head.S 2005-11-04 16:55:01.000000000 -0800
+++ linux-2.6.14-zach-work/arch/i386/kernel/head.S 2005-11-05 00:28:12.000000000 -0800
@@ -504,12 +504,12 @@ ENTRY(cpu_gdt_table)
.quad 0x0000000000000000 /* 0x80 TSS descriptor */
.quad 0x0000000000000000 /* 0x88 LDT descriptor */
- /* Segments used for calling PnP BIOS */
- .quad 0x00c09a0000000000 /* 0x90 32-bit code */
- .quad 0x00809a0000000000 /* 0x98 16-bit code */
- .quad 0x0080920000000000 /* 0xa0 16-bit data */
- .qua...
2006 Feb 12
6
Best quad-port fxo solution with EC?
Hello All,
I am trying to figure out which way to go for a quad port fxo solution
with a good echo can on it. My options are the sangoma remora, a
mediatrix fxo, or something similar.
The issue is that I would need a good EC. This would be on about a 9000
foot loop, and the lines don't function well on a spa-3000 or zaptel tdm
4 port card.
Anyone have e...
2012 Feb 14
3
[LLVMdev] LLVM GHC Backend: Tables Next To Code
....
Here is some high level documentation of the layout of Heap objects in GHC:
http://hackage.haskell.org/trac/ghc/wiki/Commentary/Rts/Storage/HeapObjects#InfoTables
With TNTC enabled we generate code for closures of this form:
.text
.align 8
.long Main_main1_srt-(Main_main1_info)+0
.long 0
.quad 4294967299
.quad 0
.quad 270582939663
.globl Main_main1_info
.type Main_main1_info, @object
Main_main1_info:
.Lc1Df:
leaq -8(%rbp),%rax
cmpq %r15,%rax
jb .Lc1Dh
[...]
.data
.globl Main_main1_closure
.type Main_main1_closure, @object
Main_main1_closure:
.quad Main_main1_info
.quad 0
Witho...
2007 Apr 18
0
[PATCH 3/21] i386 Apm seg in gdt
...head.S
===================================================================
--- linux-2.6.14-zach-work.orig/arch/i386/kernel/head.S 2005-11-04 15:46:11.000000000 -0800
+++ linux-2.6.14-zach-work/arch/i386/kernel/head.S 2005-11-05 00:28:13.000000000 -0800
@@ -510,13 +510,14 @@ ENTRY(cpu_gdt_table)
.quad 0x0080920000000000 /* 0xa0 16-bit data */
.quad 0x0080920000000000 /* 0xa8 16-bit data */
.quad 0x0080920000000000 /* 0xb0 16-bit data */
+
/*
* The APM segments have byte granularity and their bases
- * and limits are set at run time.
+ * are set at run time. All have 64k limits.
*/...
2007 Apr 18
0
[PATCH 3/21] i386 Apm seg in gdt
...head.S
===================================================================
--- linux-2.6.14-zach-work.orig/arch/i386/kernel/head.S 2005-11-04 15:46:11.000000000 -0800
+++ linux-2.6.14-zach-work/arch/i386/kernel/head.S 2005-11-05 00:28:13.000000000 -0800
@@ -510,13 +510,14 @@ ENTRY(cpu_gdt_table)
.quad 0x0080920000000000 /* 0xa0 16-bit data */
.quad 0x0080920000000000 /* 0xa8 16-bit data */
.quad 0x0080920000000000 /* 0xb0 16-bit data */
+
/*
* The APM segments have byte granularity and their bases
- * and limits are set at run time.
+ * are set at run time. All have 64k limits.
*/...